Semiconductor Device Ring Gate Electrode Layout
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Solution Overview
Problem
Conventional field-effect transistors in high-voltage power supplies have a short gate width, leading to reduced current output and increased manufacturing costs due to wasted substrate area and inefficient electron flow.
Innovation Solution
A semiconductor device with a ring-shaped gate electrode arranged around a circular or polygonal first electrode, ensuring uniform current flow and reducing invalid substrate areas by maintaining consistent shortest distances between gate and electrode sections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the drain electrode and source electrode are arranged linearly and parallel to each other, then the structure is simple, but the gate width is short and current output is reduced
Solution Approach 1:
The patent transitions from a one-dimensional linear arrangement of electrodes to a two-dimensional planar configuration where the first electrode, second electrode, and gate electrode are arranged in the same plane. This dimensional change allows the gate electrode to be positioned between the first and second electrodes, effectively increasing the gate width without increasing the vertical distance between drain and source, thereby improving current output while maintaining structural simplicity.
2Productivity
If the drain electrodes and source electrodes are alternately arranged in an array to increase gate width, then the gate width increases, but electrons flow along the shortest path and do not pass through invalid areas, causing substrate area waste and increased manufacturing cost
Solution Approach 1:
The patent employs curved or circular electrode configurations where the first electrode, second electrode, and gate electrode are arranged in a circular or arc-shaped pattern. This curvature ensures that electrons flow along a uniform path through the active layer, eliminating invalid areas where electrons would otherwise take shortcuts. The circular arrangement maximizes substrate area utilization by ensuring all areas between electrodes are effective conduction paths, thereby reducing manufacturing cost while maintaining increased gate width.
Data Source
AI summary
A semiconductor device includes a substrate and a plurality of transistors arranged on the substrate in an array. The transistor includes a first electrode, a plurality of second electrodes, and a gate electrode. The second electrodes are arranged around the first electrode. The gate electrode is located between the first electrode and the second electrodes. The first electrode is a polygon. The gate electrode is around the first electrode, and an edge of the gate electrode facing the first electrode has a shape corresponding to that of the first electrode. The first electrode and the edge of the gate electrode facing the first electrode are regular polygons, and have the same center.