Semiconductor Interconnect Structure for SADP Contact Routing
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Solution Overview
Problem
The transition from the litho-etch-litho-etch (LE-LE) process to other semiconductor manufacturing processes, such as self-aligned double patterning (SADP), renders existing stitch-like structures obsolete, necessitating a replacement for these contact structures in LE-LE layouts.
Innovation Solution
A method of forming semiconductor structures involves creating conductors and conductive vias in dielectric layers, followed by the formation of electrodes and conductive lines using a hard mask and patterning spacers, allowing for the creation of alternative connection structures that replace stitch-like structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the litho-etch-litho-etch (LE-LE) process is replaced by self-aligned double patterning (SADP) process, then manufacturing precision is improved, but existing stitch-like contact structures become obsolete and cannot be provided
Solution Approach 1:
The contact structure is divided into multiple separate components: conductors in the first dielectric layer, conductive vias in the second dielectric layer, and conductive lines in the third dielectric layer. This segmentation allows each component to be formed using SADP process independently, replacing the traditional single-step LE-LE stitch-like structure while maintaining functional connectivity.
Solution Approach 2:
The invention transitions from a two-dimensional planar stitch-like structure to a three-dimensional multi-layer structure. Conductors, conductive vias, and conductive lines are stacked vertically across three different dielectric layers, providing connectivity in the vertical dimension while maintaining horizontal separation, thus adapting to SADP process constraints.
2Manufacturing precision
If stitch-like structures are removed to accommodate SADP process, then manufacturing precision is improved, but connectivity between contact routings at the same level deteriorates
Solution Approach 1:
Connectivity is achieved by moving from horizontal connections in a single layer to vertical connections through multiple layers. Conductive vias provide vertical pathways through the second dielectric layer, while conductors and conductive lines in different layers establish horizontal connections at their respective levels, collectively providing end-to-end connectivity without requiring in-plane stitching.
Solution Approach 2:
The conductive vias act as intermediary elements that bridge the gap between conductors in the first dielectric layer and conductive lines in the third dielectric layer. These vias serve as vertical connectors, mediating the signal path between different routing layers and replacing the direct horizontal stitching function.
3Adaptability or versatility
If multi-layer conductive structure is formed to replace stitch-like structures, then adaptability to SADP process is improved, but device complexity increases
Solution Approach 1:
The self-aligned double patterning process is employed to automatically form the conductors, conductive vias, and conductive lines with precise alignment without requiring manual intervention for each layer. The process self-aligns the features across multiple layers, reducing the operational complexity despite the increased structural complexity of the multi-layer conductive system.
Data Source
AI summary
A method of forming a semiconductor structure includes a number of operations. Conductors are formed in a first dielectric layer on a substrate. First conductive vias overlapping the conductors are formed in a second dielectric layer on the substrate. Electrodes are formed in a third dielectric layer on the substrate, wherein each of the electrodes overlaps one of the first conductive vias. A hard mask is formed on the third dielectric layer. Mandrel exposures are formed on the hard mask. Patterning spacers is formed on sidewalls of the mandrel exposures. The mandrel exposures are removed. The hard mask is patterned based on the patterning spacers and the third dielectric layer is patterned based on the patterning spacers to form conductive lines along the second direction in the third dielectric layer, wherein each of the conductive lines overlaps one of the first conductive vias.