Semiconductor Device Schottky Barrier Diode Latchup Prevention
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Solution Overview
Problem
In semiconductor devices with switching elements connected to inductive loads, parasitic diodes can cause current flow when the gate is OFF, leading to thermal destruction due to amplified current and parasitic thyristor operation, especially in H-bridge and DC-DC converter circuits.
Innovation Solution
A semiconductor device structure incorporating a Schottky barrier diode connected in parallel with the high-side switching element, featuring a p-type semiconductor region with higher impurity concentration between the anode and cathode, and a third electrode on the insulating film to reduce current flow through the substrate and prevent latchup, utilizing a Shallow Trench Isolation (STI) structure for increased breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a switching element is connected to an inductive load, then the switching element can control current flow to the load, but current flows through the body diode when the gate is OFF causing parasitic thyristor operation and thermal destruction
Solution Approach 1:
A P-type semiconductor region is introduced as an intermediary between the body diode and the substrate. This P-type region acts as a mediator that blocks the harmful current path from the body diode to the substrate, preventing parasitic thyristor operation while allowing the switching element to maintain its current control function.
Solution Approach 2:
The harmful current path through the substrate is extracted and blocked by introducing the P-type semiconductor region. This effectively removes the problematic current flow path that causes parasitic thyristor operation, while preserving the necessary current control through the switching element.
2Reliability
If the P-type semiconductor region is introduced to block current flow, then parasitic thyristor operation is prevented, but additional semiconductor regions increase device complexity
Solution Approach 1:
The P-type semiconductor region is merged with the existing N-type well structure to form an integrated P-N junction. This combination approach prevents parasitic thyristor operation while minimizing additional structural complexity by utilizing the existing device architecture rather than adding completely separate components.
3Reliability
If the P-type semiconductor region with higher impurity concentration is used, then current flow through the substrate is suppressed, but manufacturing precision requirements increase
Solution Approach 1:
The impurity concentration of the P-type semiconductor region is optimized to be higher than conventional levels. This parameter change enhances the current blocking capability and prevents parasitic thyristor operation more effectively, while the manufacturing process is adjusted to achieve the required precision for this optimized parameter.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively disperses coil current between the switching element and Schottky barrier diode, suppressing current flow through the parasitic p-n-p transistor, preventing thermal destruction and latchup, while enhancing breakdown voltage and current capability, thus ensuring reliable operation in high-power applications.
Implementation Method 1
A semiconductor device structure incorporating a Schottky barrier diode connected in parallel with the high-side switching element
Implementation Method 2
utilizing a Shallow Trench Isolation (STI) structure for increased breakdown voltage
Data Source
AI summary
According to one embodiment, the insulating film is provided between the anode region and the cathode region in the surface of the second semiconductor region. The third semiconductor region is provided inside the second semiconductor region. The third semiconductor region covers a corner of the insulating film on the anode region side. The first electrode contacts the anode region and the third semiconductor region. The second electrode contacts the cathode region. The third electrode is provided on the insulating film and positioned on a p-n junction between the second semiconductor region and the third semiconductor region.