Semiconductor Structure Seal Ring Protection
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Solution Overview
Problem
The miniaturization of semiconductor devices leads to increased complexity in manufacturing, resulting in issues such as poor structural configuration, delamination, and yield loss, along with higher manufacturing costs due to challenges in protecting the devices from cracks and chippings during fabrication and singulation.
Innovation Solution
A semiconductor structure that includes a die, a molding surrounding the die, a first interconnect structure, a second interconnect structure, and a seal ring disposed within the second interconnect structure adjacent to its edge, which protects the die and interconnect structures from damages caused by cracks, chippings, or contaminants during fabrication or singulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the semiconductor device is miniaturized to increase functionality and integration, then the device size is reduced, but the manufacturing complexity increases leading to poor structural configuration and delamination
Solution Approach 1:
The patent divides the semiconductor device into distinct layers including a substrate layer, a first die layer, a molding layer, a second die layer, and an interconnect layer. Each layer is independently structured and can be manufactured separately before being integrated, which reduces the overall manufacturing complexity despite the miniaturized scale of the final device.
Solution Approach 2:
The patent transitions from planar 2D integration to 3D vertical stacking by positioning die layers at different heights and connecting them through vertical interconnect structures. This dimensional change allows increased functionality within a smaller footprint while maintaining manageable manufacturing processes for each layer.
2Adaptability or versatility
If multiple components are assembled on a single semiconductor device to increase functionality, then the integrated circuitry is enhanced, but the structural configuration deteriorates causing delamination
Solution Approach 1:
The patent combines multiple die layers, molding layers, and interconnect structures into a single integrated semiconductor device. The molding layer acts as a unified structure that encapsulates and bonds the die layers together, maintaining structural integrity while enabling multiple components to function together on a single device.
Solution Approach 2:
The patent employs composite material structures where different materials (substrate material, die material, molding material, interconnect material) are strategically combined in layered configurations. Each material is selected for its specific properties, and their composite arrangement provides both the functionality needed for multiple components and the structural stability to prevent delamination.
3Productivity
If manufacturing operations are increased within a small semiconductor device to enhance functionality, then the integrated circuitry is improved, but the yield loss increases due to cracks and chippings
Solution Approach 1:
The patent incorporates a molding layer that surrounds and protects the die layers and interconnect structures before final device completion. This molding structure acts as a cushioning element that absorbs mechanical stresses and prevents crack propagation during subsequent manufacturing operations, singulation, and handling, thereby reducing yield loss from defects.
4Volume of moving object
If the device is miniaturized to reduce size, then the form factor is improved, but the manufacturing cost increases due to protection requirements
Solution Approach 1:
The molding layer serves multiple functions simultaneously: it provides structural support for the miniaturized die layers, acts as a protective barrier against cracks and chippings, facilitates heat dissipation, and enables electrical isolation between different interconnect structures. This multi-functionality reduces the need for additional separate protection components, thereby controlling manufacturing costs despite the miniaturized scale.
Data Source
AI summary
A semiconductor structure includes a first interconnect structure, a second interconnect structure, a molding, a first seal ring and a second seal ring. The molding surrounds the die. The molding and the die are disposed between the first interconnect structure and the second inter connect structure. The first seal ring is disposed in the first interconnect structure. The second seal ring is disposed in the second interconnect structure.


