Semiconductor Sealing Structure with Segmented Barriers

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Solution Overview

Problem

Existing semiconductor arrangements face challenges in preventing impurity diffusion into active regions while maintaining a sufficient area for attachment layers, as conventional sealing structures are either ineffective or reduce the attachment area.

Innovation Solution

A semiconductor arrangement featuring a sealing structure with a first barrier, second barrier, and third barrier, where the third barrier is electrically or dielectrically insulating, positioned between the attachment layer and the semiconductor body, preventing impurity diffusion while allowing for a larger attachment layer area by maintaining electrical insulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If a conventional sealing structure is used to prevent impurity diffusion, then impurity protection is improved, but the attachment layer area is reduced

Engineering Contradiction:
Improveimpurity diffusionVSAvoidattachment layer area
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The sealing structure is divided into three distinct barriers: a first barrier (electrically conducting layer) extending through the layer stack, a second barrier (insulating layer) arranged between the first barrier and the semiconductor body, and a third barrier (additional insulating layer) extending from the first barrier to the second barrier. This segmentation allows each barrier to perform its specific function while maintaining overall sealing effectiveness without requiring a single large structure that would reduce attachment area.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second barrier acts as an intermediary between the electrically conducting first barrier and the semiconductor body, providing electrical insulation while allowing the third barrier to extend from the first barrier to the second barrier. This intermediary structure enables the sealing function to be achieved without the conducting layer directly contacting the semiconductor body, thereby preventing impurity diffusion while maintaining proper electrical isolation and preserving attachment layer area.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the attachment layer is made electrically insulated from the conducting layer of the sealing structure, then electrical insulation is improved, but the sealing effectiveness may be compromised

Engineering Contradiction:
Improveelectrical insulationVSAvoidimpurity diffusion protection
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The sealing structure is segmented into multiple barriers with distinct electrical properties. The first barrier (conducting layer) provides impurity diffusion protection, while the second barrier (insulating layer) provides electrical insulation. The third barrier extends from the first barrier to the second barrier, ensuring both sealing effectiveness and electrical insulation are maintained simultaneously without compromising either function.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Effectively prevents impurity diffusion into the semiconductor body's active regions while enabling a larger attachment layer area, ensuring the semiconductor arrangement's integrity and functionality.

Implementation Method 1

at least one first type sealing structure (S1). The sealing structure includes a first barrier (20), a second barrier (30), and a third barrier (40)... preventing impurity diffusion while allowing for a larger attachment layer area by maintaining electrical insulation

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS10541212B2Semiconductor arrangement with a sealing structure
Publication Date: 2020.01.21 INFINEON TECHNOLOGIES AG
  • US10541212B2 patent drawing
  • US10541212B2 patent drawing
  • US10541212B2 patent drawing

AI summary

A semiconductor arrangement includes a semiconductor body with a first surface, an inner region and an edge region, the edge region surrounding the inner region, an attachment layer spaced apart from the first surface of the semiconductor body in a first direction, an intermediate layer arranged between the first surface of the semiconductor body and the attachment layer, and at least one first type sealing structure. The sealing structure includes a first barrier, a second barrier, and a third barrier. The first barrier is arranged in the intermediate layer and spaced apart from the attachment layer in the first direction. The second barrier is arranged in the intermediate layer, is spaced apart from the first surface in the first direction, and is spaced apart from the first barrier in a second direction. The third barrier extends from the first barrier to the second barrier in the second direction.