Semiconductor Sealing Structure for Dicing Crack and Moisture Control
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Solution Overview
Problem
Existing semiconductor devices face challenges in effectively managing stress and moisture permeation during the dicing process, leading to potential cracks and structural integrity issues.
Innovation Solution
Incorporation of a first sealing portion with a void structure around the outer periphery of the core region to act as a crack stopper and moisture barrier, enhancing the structural integrity of the semiconductor device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional semiconductor device structure without a sealing portion is used, then the device complexity is low, but cracks occur during dicing and structural integrity deteriorates
Solution Approach 1:
The sealing portion is formed in advance during the manufacturing process, before the dicing step. This preliminary action of creating the sealing structure prevents cracks from propagating during subsequent dicing operations, thereby improving structural integrity without requiring additional post-manufacturing steps
Solution Approach 2:
The sealing portion is divided into multiple segments: a first sealing portion and a second sealing portion, which are positioned at different locations around the core region. This segmentation allows the stress and crack propagation to be controlled at multiple points, enhancing overall structural reliability while maintaining manageable device complexity
2Productivity
If the dicing process is performed on conventional semiconductor devices, then productivity is maintained, but stress concentration leads to crack formation
Solution Approach 1:
The sealing portion acts as an intermediary structure between the core region and the external environment. It mediates the stress distribution during dicing by providing a compliant interface that absorbs stress concentration, thereby preventing crack formation while allowing the dicing process to proceed at normal productivity levels
Solution Approach 2:
The sealing portion is designed to provide cushioning effect before the dicing process occurs. By positioning the sealing structure in advance around the core region, it creates a protective buffer that absorbs and distributes the mechanical stress during dicing, preventing crack propagation without affecting the dicing speed or productivity
3Reliability
If moisture barrier structures are added to prevent moisture ingress, then reliability improves, but manufacturing complexity increases
Solution Approach 1:
The sealing portion serves multiple functions simultaneously: it acts as both a mechanical seal to prevent crack propagation and a moisture barrier to prevent moisture ingress. This multi-functionality achieves improved reliability against both cracking and moisture damage without requiring separate structures, thereby maintaining ease of manufacture
Solution Approach 2:
The sealing portion combines the crack prevention function and moisture barrier function into a single integrated structure. By merging these two protective functions into one component rather than using separate structures, the manufacturing process remains simple while achieving comprehensive protection against both mechanical and environmental damage
Data Source
AI summary
A semiconductor device according to an embodiment includes a substrate, a transistor, an insulating layer, and a first sealing portion. The substrate includes a first region, and a second region provided to surround an outer periphery of the first region. The transistor is provided on the substrate in the first region. The insulating layer is provided above the transistor and over the first region and the second region. The first sealing portion is provided to divide the insulating layer and surround the outer periphery of the first region in the second region. The first sealing portion includes a first void.