Semiconductor Device Sealing Feature for Hermetic MEMS Bonding
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Solution Overview
Problem
Existing methods for forming Micro-Electro Mechanical Systems (MEMS) devices are not entirely satisfactory in achieving optimal mechanical functionality and hermetic sealing, leading to challenges in device performance and reliability.
Innovation Solution
A semiconductor device structure is formed by bonding a semiconductor substrate with a cap substrate, creating a sealed chamber around movable features, and using a sealing feature to enhance hermetic protection and bonding strength without requiring high-temperature and high-pressing forces, thereby preventing device cracking and reducing fabrication costs and time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If high-temperature and high-pressing forces are used for bonding substrates, then bonding strength is improved, but device cracking increases and fabrication complexity increases
Solution Approach 1:
A sealing feature is introduced as an intermediary element between the semiconductor substrate and cap substrate. This sealing feature fills trenches in both substrates and provides bonding surfaces that enable strong adhesion without requiring high-temperature and high-pressing forces, thereby preventing device cracking while maintaining bonding strength
Solution Approach 2:
The bonding process parameters (temperature and pressure) are changed from traditional high-temperature/high-pressure conditions to lower, more controlled conditions. The sealing feature enables effective bonding at these reduced parameters, eliminating the need for extreme conditions that cause cracking
2Strength
If metal bonding processes are used, then bonding strength is improved, but fabrication cost and time increase
Solution Approach 1:
The metal bonding process is extracted and replaced from the fabrication sequence. Instead of using metal bonding, the invention employs a sealing feature-based bonding approach that eliminates the need for metal layers and complex bonding equipment, thereby reducing fabrication cost and time while maintaining bonding strength
Solution Approach 2:
The sealing feature acts as a disposable, single-use bonding element that is formed through simple trench filling and curing processes. This replaces expensive, time-consuming metal bonding processes, making the overall fabrication more cost-effective and efficient
3Reliability
If hermetic sealing is improved, then device reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The hermetic sealing function is merged with the bonding structure. The sealing feature simultaneously provides hermetic protection and mechanical bonding between substrates, eliminating the need for separate sealing layers and complex multi-step sealing processes, thereby reducing manufacturing complexity while improving reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly enhances the device performance and reliability of MEMS devices by ensuring precise alignment and strong bonding between substrates, maintaining desired pressure within the chamber, and providing effective hermetic protection without the need for metal bonding processes.
Implementation Method 1
forming a sealing feature over the third surface of the cap substrate to fill the chamber
Implementation Method 2
bonding a semiconductor substrate with a cap substrate
Data Source
AI summary
Structures and formation methods of a semiconductor device structure are provided. A semiconductor device structure includes a semiconductor substrate including a cavity and a movable feature in the cavity. The semiconductor device structure also includes a cap substrate bonded to the semiconductor substrate to seal the cavity. There is an interface between the cap substrate and the semiconductor substrate. The semiconductor device structure further includes a sealing feature embedded in the semiconductor substrate and surrounding the cavity. The sealing feature extends across the interface and penetrates through the cap substrate.