Semiconductor Package Sealing Layout to Prevent PCB Voids

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Solution Overview

Problem

Semiconductor devices face reliability issues due to incomplete sealing around ceramic circuit boards, printed circuit boards, and external connection terminals, leading to voids and reduced reliability.

Innovation Solution

A semiconductor device design featuring a case with storage parts of varying heights for the sealing material, where the sealing surface is higher around the printed circuit board than the semiconductor chip, ensuring comprehensive sealing and preventing voids.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the case is filled with melted sealing material to seal the semiconductor chip, ceramic circuit board, and external connection terminal, then the sealing process is simplified, but some parts cannot be sufficiently sealed due to arrangement and shape constraints, leading to voids and reduced reliability

Engineering Contradiction:
Improvesealing process simplicityVSAvoidsealing completeness
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The storage part is divided into a first storage part and a second storage part with different heights. The first storage part has a first height to store the semiconductor chip, while the second storage part has a second height greater than the first height to store the printed circuit board and allow excess sealing material to flow. This segmentation enables different sealing requirements for different components, ensuring complete sealing without voids while maintaining manufacturing simplicity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The case provides different storage heights at different locations: the first storage part has a specific height suitable for the semiconductor chip, while the second storage part has a greater height to accommodate the printed circuit board and excess sealing material. This local differentiation of storage part heights ensures that each component is sealed appropriately according to its specific requirements, improving overall sealing completeness and reliability.

Inventive Principle:
Principle #3Local quality

2Device complexity

If uniform height storage parts are used in the case, then the manufacturing process is simpler, but insufficient sealing occurs around components with different heights, causing voids

Engineering Contradiction:
Improvecase structure simplicityVSAvoidsealing uniformity
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The storage part is segmented into multiple regions with different heights: the first storage part for the semiconductor chip and the second storage part for the printed circuit board. This segmentation allows each region to be optimized for its specific component, ensuring that sealing material reaches all necessary areas uniformly without voids, while adding only moderate structural complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The case structure extends in the vertical dimension by creating storage parts with different heights. The first storage part has a first height and the second storage part has a second height greater than the first height. This dimensional variation allows the sealing material to flow properly around components of different heights, achieving uniform sealing precision without requiring complex lateral adjustments.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of operation

If the sealing material level is uniform across the storage part, then the sealing process is easier to control, but voids form around components of different heights

Engineering Contradiction:
Improvesealing material filling controlVSAvoidvoid prevention
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The storage part is divided into a first storage part and a second storage part with different heights. When sealing material is filled, it naturally settles to different levels in each segment: the first level in the first storage part and a second level in the second storage part. This segmentation allows easy control of the filling process while ensuring the sealing material reaches appropriate levels for each component, preventing voids and improving reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The different heights of the first and second storage parts create equipotential sealing surfaces for different components. The sealing material naturally settles to match the height requirements of each component type, with the first storage part providing a sealing surface at the first level for the semiconductor chip and the second storage part providing a sealing surface at the second level for the printed circuit board. This eliminates voids while maintaining ease of operation.

Inventive Principle:
Principle #12Equipotentiality

Data Source

PatentUS11855049B2Semiconductor device
Publication Date: 2023.12.26 FUJI ELECTRIC CO LTD
  • US11855049B2 patent drawing
  • US11855049B2 patent drawing
  • US11855049B2 patent drawing

AI summary

A semiconductor device including a semiconductor chip, an insulating circuit board having a circuit pattern formed on an insulating plate, a case including a frame part having an opening that is substantially rectangular in a plan view of the semiconductor device, inner wall surfaces of the frame part at the opening forming a storage part to store the insulating circuit board, and a printed circuit board which has a flat plate shape and which protrudes from one of the inner wall surfaces of the frame part toward the storage part. The semiconductor device further includes a sealing material filled in the storage part, to thereby seal the semiconductor chip and the printed circuit board. A front surface of the sealing material forms a sealing surface, and in a thickness direction of the semiconductor chip, the sealing surface is higher around the printed circuit board than around the semiconductor chip.