Semiconductor Integrated Circuit Secure Checker and Detector

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Solution Overview

Problem

Existing semiconductor integrated circuits lack reliable mechanisms to ensure detection signals from environmental detectors are genuine and active, making them vulnerable to unauthorized access and environmental damage.

Innovation Solution

Incorporating a secure checker and detector system that generates and verifies detection signals, using a random number generator to synchronize operations with a clock signal, and periodically checking detector states to ensure the integrity of detection signals and prevent unauthorized access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a detector is added to monitor abnormal conditions, then security is improved, but device complexity increases

Engineering Contradiction:

Improvedetection signal reliabilityVSAvoidcircuit structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The secure checker is integrated within the semiconductor integrated circuit, with the detector nested inside the secure checker structure. The detector monitors the active state of the secure checker itself, creating a self-contained verification system that doesn't require external monitoring components.

Inventive Principle:

Principle #7Nested doll (Nesting)

Solution Approach 2:

The detector automatically monitors whether the secure checker is in an active state and generates detection signals when abnormalities are detected. The system performs self-verification without requiring external intervention, reducing the need for additional control circuitry.

Inventive Principle:

Principle #25Self-service

2Reliability

If detection signals are continuously monitored, then security is improved, but energy consumption increases

Engineering Contradiction:

Improvesecurity protectionVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The detector periodically checks whether the secure checker is in an active state rather than continuously monitoring. This periodic verification approach maintains security while significantly reducing power consumption compared to continuous monitoring schemes.

Inventive Principle:

Principle #19Periodic action

3Measurement precision

If the detector is always active, then detection reliability is improved, but power consumption increases

Engineering Contradiction:

Improvedetection accuracyVSAvoiddetector power consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The detector operates periodically to determine if the secure checker is active, rather than remaining constantly active. This periodic operation maintains detection accuracy by verifying the secure checker's state at appropriate intervals while minimizing power consumption during idle periods.

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The detector is configured to activate and perform detection when the secure checker transitions to an active state. This preliminary action ensures detection reliability is maintained during critical periods while the detector remains inactive during non-critical periods, reducing overall power consumption.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS8332662B2Semiconductor integrated circuit and testing method thereof

Publication Date: 2012.12.11 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor integrated circuit including a detector and a secure checker. The detector generates a detection signal upon sensing an abnormal state in an operating environment of the semiconductor integrated circuit. The secure checker generates a check signal to find an operating condition of the detector and receives the detection signal. The detector activates the detection signal in response to the check signal.