Semiconductor Package Seed Layer Alignment

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Solution Overview

Problem

Current semiconductor packages face challenges in achieving high reliability and electrical characteristics due to defects caused by misalignment between conductive pads and through electrodes, which complicates the manufacturing process and reduces productivity.

Innovation Solution

A method is developed where a seed pattern is formed on the conductive pads of semiconductor chips and a substrate, allowing for the formation of through electrodes using the seed pattern as a seed, which simplifies the process and reduces defects by directly bonding the wafer to the substrate with an adhesive mold layer, and the through electrodes are formed using electroplating or metal growth processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional bonding methods are used without a seed pattern, then the bonding process is simpler, but misalignment between conductive pads and through electrodes occurs causing defects

Engineering Contradiction:
Improvealignment precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The seed pattern is formed on the substrate before bonding the wafer to the substrate. This preliminary formation of the seed pattern ensures that when through electrodes are later formed, they automatically align with the conductive pads through the seed pattern's positioning, eliminating misalignment defects while maintaining process simplicity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The seed pattern acts as an intermediary element between the conductive pad and the through electrode. It provides a reference structure that facilitates precise alignment during the bonding process, ensuring that through electrodes are correctly positioned relative to conductive pads without requiring complex alignment procedures

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If through electrodes are formed before bonding, then alignment can be controlled, but the manufacturing process becomes more complex and productivity decreases

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidprocess complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The seed pattern is prepared in advance on the substrate before wafer bonding, but the actual through electrode formation is delayed until after bonding. This allows the bonding process to proceed with simple alignment using the seed pattern as a guide, maintaining high productivity while ensuring proper electrode positioning

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The seed pattern serves as a self-aligning feature that guides the through electrode formation process. Once the seed pattern is in place, the subsequent through electrode formation automatically aligns with the conductive pads through the seed pattern's positioning, eliminating the need for complex external alignment control mechanisms

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances the reliability and electrical characteristics of semiconductor packages by minimizing defects and simplifying the manufacturing process, thereby improving productivity and reducing costs.

Implementation Method 1

bonding the first side of the substrate to the wafer with the adhesive mold layer

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

forming the through electrode using electroplating or metal growth processes

Methodology Applied
Scientific EffectElectroplating: Electroplating

Implementation Method 3

forming the through electrode using electroplating or metal growth processes

Methodology Applied
Scientific EffectMetal growth: Deposition (physical)

Data Source

PatentUS8778776B2Methods of forming a semiconductor package using a seed layer and semiconductor packages formed using the same
Publication Date: 2014.07.15 SAMSUNG ELECTRONICS CO LTD
  • US8778776B2 patent drawing
  • US8778776B2 patent drawing
  • US8778776B2 patent drawing

AI summary

Provided is a method of forming a semiconductor package including providing a substrate having a first side and an opposite second side and providing a wafer having a plurality of semiconductor chips, each of the semiconductor chips having a conductive pad, wherein at least one of the substrate and the wafer includes a seed pattern. The first side of the substrate is bonded to the wafer with the conductive pad positioned adjacent to the first side of the substrate and the seed pattern positioned between the conductive pad and the first side of the substrate. A through hole is then formed penetrating the substrate from the second side of the substrate to expose the seed pattern. A through electrode is formed in the through hole using the seed pattern as a seed. Corresponding devices are also provided.