Semiconductor Device Segmentation for Low Power and High Speed
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Solution Overview
Problem
Semiconductor devices face challenges in reducing power consumption, size, and off-state current while maintaining high-speed and low-voltage operation across a wide temperature range.
Innovation Solution
A semiconductor device with a circuit configuration that includes multiple transistors and capacitors using oxide semiconductors, allowing for low off-state current and efficient data retention, and a line buffer with high writing and reading speeds, enabling small size and high-speed operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional semiconductor devices are used to increase data processing capacity, then functionality is improved, but power consumption increases
Solution Approach 1:
The semiconductor device is divided into multiple independent memory blocks (first memory block, second memory block, etc.) that can be selectively activated. Only the necessary memory blocks are powered on based on data storage requirements, while others remain in a low-power state, thereby reducing overall power consumption while maintaining data processing capacity.
Solution Approach 2:
The device employs dynamic power management through selective activation of memory blocks. The control circuit dynamically enables or disables specific memory blocks based on operational needs, allowing the system to adapt power consumption to actual data processing requirements rather than maintaining constant high power usage.
2Volume of moving object
If device size is reduced to meet miniaturization requirements, then portability is improved, but heat dissipation becomes more difficult
Solution Approach 1:
The memory device is segmented into multiple independent blocks with separate transistor and capacitor structures. This segmentation allows for distributed heat generation across multiple small units rather than concentrating heat in a single large structure, improving heat dissipation efficiency while maintaining a compact overall device size.
Solution Approach 2:
Different memory blocks can be configured with different transistor sizes and capacitor values optimized for specific functions. This local optimization allows critical areas to have enhanced performance while other areas can be minimized, achieving compact size without compromising essential functions and improving thermal management through localized design adjustments.
3Loss of energy
If oxide semiconductor transistors are used to reduce off-state current, then power consumption is reduced, but manufacturing complexity increases
Solution Approach 1:
The invention utilizes oxide semiconductor materials with specific physical and electrical parameters (wide bandgap, low carrier concentration) to achieve extremely low off-state currents. By selecting materials with inherent low-leakage properties and optimizing their structural parameters during fabrication, the device achieves超低漏电流 while using established semiconductor manufacturing processes, thereby limiting the increase in manufacturing complexity.
Data Source
AI summary
A small semiconductor device suitable for high-speed operation is provided. The semiconductor device includes a first circuit, a global bit line pair for writing, a global bit line pair for reading, and a local bit line pair. The first circuit includes second to fifth circuits. The second to fifth circuits are electrically connected to each other by the local bit line pair. The second circuit functions as a read/write selection switch. The third circuit functions as a working memory that stores 1-bit complementary data temporarily. The fourth circuit has a function of precharging the local bit line pair. The fifth circuit includes n (n is an integer of 2 or more) sixth circuits. The sixth circuits each have a function of retaining 1-bit complementary data written from the third circuit.