Semiconductor Device With Segmented Conductive Members
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Solution Overview
Problem
Current semiconductor devices face challenges in optimizing the configuration of conductive members and semiconductor regions to achieve improved electrical characteristics, such as reduced capacitance and enhanced switching performance, while maintaining high breakdown voltage and low on-resistance.
Innovation Solution
The semiconductor device incorporates a unique configuration with conductive members having different crystal orientations and concave surfaces, along with specific insulating regions and semiconductor regions, to reduce capacitance and improve switching characteristics by forming a void between the conductive members and optimizing the channel length and gate overlap.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor device configuration is used, then manufacturing is simpler, but capacitance is higher and switching performance is poorer
Solution Approach 1:
The conductive members are divided into multiple segments with different crystal orientations along the channel length. The first conductive member has a first crystal orientation, while the second conductive member has a second crystal orientation different from the first. This segmentation allows optimization of electrical characteristics in different regions of the device, reducing capacitance and improving switching performance.
Solution Approach 2:
Different regions of the conductive members are assigned different crystal orientations to achieve local optimization. The first conductive member region has a crystal orientation optimized for one aspect, while the second conductive member region has a different crystal orientation optimized for another aspect. This local quality variation enables simultaneous improvement of breakdown voltage and switching characteristics.
2Reliability
If conductive members with uniform crystal orientation are used, then manufacturing is easier, but capacitance reduction and switching performance improvement are limited
Solution Approach 1:
The conductive members are segmented into regions with different crystal orientations. The first conductive member comprises a first region with a first crystal orientation and a second region with a second crystal orientation. This segmentation enables capacitance reduction by creating electric field distribution that minimizes overlap capacitance while maintaining manufacturability through controlled growth processes.
Solution Approach 2:
The crystal orientation parameter is changed across different regions of the conductive members. By varying the crystal orientation from the first orientation in the first conductive member to the second orientation in the second conductive member, the device achieves lower capacitance and improved switching performance while using established semiconductor manufacturing techniques.
3Reliability
If conventional insulating region configuration is used, then device structure is simpler, but breakdown voltage and on-resistance optimization is insufficient
Solution Approach 1:
The insulating regions are configured with specific orientations relative to the conductive members to achieve local optimization of electrical characteristics. The first insulating region is oriented to support high breakdown voltage between the first conductive member and semiconductor region, while the second insulating region is oriented to optimize on-resistance and switching characteristics. This local quality approach enables simultaneous optimization of multiple electrical parameters.
Solution Approach 2:
The insulating regions act as intermediaries between the conductive members and semiconductor regions. These insulating regions provide electrical isolation while allowing controlled field distribution, enabling the device to achieve high breakdown voltage and low on-resistance through optimized field management at the interfaces between conductive and semiconductor regions.
Data Source
AI summary
According to one embodiment, a semiconductor device includes first, and second conductive members, first, second, and third semiconductor regions, and an insulating part. A direction from the first conductive member toward the second conductive member is along a first direction. The first semiconductor region includes first and second partial regions. A second direction from the first partial region toward the second partial region crosses the first direction. The first conductive member is between the first partial region and the second conductive member. A direction from the second partial region toward the second semiconductor region is along the first direction. A direction from the second conductive member toward the second semiconductor region is along the second direction. The third semiconductor region is between the second partial region and the second semiconductor region. The insulating part includes a first insulating region, a second insulating region, and a third insulating region.