Semiconductor Device Segmented Contact Plug for BCAT Reliability
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Solution Overview
Problem
Buried channel array transistors (BCATs) face variations in characteristics such as gate-induced drain leakage (GIDL) and current amount due to the depth of the gate electrode in the trench, which affects device performance.
Innovation Solution
A semiconductor device design featuring a substrate with a device isolation layer, trenches, gate electrodes, recesses, and contact plugs, where the lower contact plug is made of carbon-doped polysilicon and the upper contact plug is made of metal, with the top surfaces of the plugs being coplanar with the substrate, and the recesses overlapping the device isolation layer and active region, to improve contact and reduce impurity diffusion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate electrode is buried deeper in the trench to overcome short channel effect, then the control over channel is improved, but gate-induced drain leakage (GIDL) increases and device performance deteriorates
Solution Approach 1:
The contact plug is divided into two separate parts: a lower contact plug and an upper contact plug. The lower contact plug is positioned at a first depth to contact the source/drain region, while the upper contact plug is positioned at a second depth (deeper than the first) to contact the lower contact plug. This segmentation allows the electrical connection to be established without requiring a single deep contact plug that would extend into the channel region and cause GIDL.
Solution Approach 2:
The lower contact plug acts as an intermediary element between the source/drain region and the upper contact plug. It provides a intermediate connection point that allows electrical signal transmission without requiring the upper contact plug to extend deep into the channel region, thereby preventing GIDL while maintaining electrical connectivity.
2Reliability
If a single deep contact plug is used to reach the source/drain region, then contact is established, but impurity diffusion increases and reliability decreases
Solution Approach 1:
The contact structure is segmented into lower and upper contact plugs at different depths. The lower contact plug contacts the source/drain region at a shallower depth, avoiding extension into the channel region. This segmentation prevents impurity diffusion while maintaining effective electrical contact through the two-stage contact structure.
3Reliability
If the contact plug extends deep into the channel region, then connection to source/drain is achieved, but device characteristics become unstable
Solution Approach 1:
The contact plug is segmented into lower and upper portions at different depths. The lower contact plug provides stable connection to the source/drain region without extending into the channel, while the upper contact plug provides additional connection point. This segmentation ensures both connection stability and characteristic stability by preventing channel region interference.
Solution Approach 2:
The contact structure utilizes vertical dimensionality with contact plugs at different depths (first depth and second depth). This multi-level vertical arrangement provides redundant connection paths, enhancing both connection stability and device characteristic stability without requiring any single contact plug to extend deeply into the channel region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances the reliability of the semiconductor device by preventing impurity diffusion and improving contact efficiency, thereby stabilizing BCAT characteristics and performance.
Implementation Method 1
The lower contact plug may include carbon doped polysilicon... preventing impurity diffusion
Data Source
AI summary
Provided is a semiconductor device, including a substrate including a device isolation layer and an active region isolated by the device isolation layer; a trench in the active region; a gate electrode filling at least a portion of the trench; a recess in the substrate at one side of the gate electrode, the recess overlapping a portion of the device isolation layer and the active region; and a lower contact plug filling the recess.