Semiconductor Device Segmented Upper Electrode for Avalanche Ruggedness
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Solution Overview
Problem
Semiconductor devices such as MOSFET and IGBT face challenges in achieving improved avalanche ruggedness, which is essential for power conversion applications, as they often experience voltage drops and parasitic transistor operation during avalanche breakdowns.
Innovation Solution
The semiconductor device design includes a specific structure with p-type and n-type semiconductor regions, a gate electrode, and a multi-part upper electrode configuration, which enhances hole discharge routes and reduces electrical resistance, thereby improving avalanche ruggedness by expanding the contact area between the p+-type contact region and the upper electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional semiconductor device structure is used, then the device can be manufactured with standard processes, but the avalanche ruggedness is insufficient due to limited hole discharge routes and higher electrical resistance
Solution Approach 1:
The upper electrode is divided into multiple separate electrodes (first upper electrode, second upper electrode, third upper electrode) instead of a single continuous electrode. This segmentation creates multiple independent contact points with the p+-type contact region, increasing the number of hole discharge routes and reducing electrical resistance during avalanche breakdown, thereby improving avalanche ruggedness
Solution Approach 2:
The patent introduces a planar dimension to the electrode contact structure by arranging multiple upper electrodes side-by-side in the horizontal plane, in addition to the vertical stacking of semiconductor layers. This dimensional expansion increases the total contact area between the upper electrodes and the p+-type contact region, providing more pathways for hole discharge and reducing overall electrical resistance
2Reliability
If the contact area between the p+-type contact region and the upper electrode is increased, then the electrical resistance is reduced and more hole discharge routes are available, but the device structure becomes more complex
Solution Approach 1:
The upper electrode is divided into multiple separate electrodes (first upper electrode, second upper electrode, third upper electrode) instead of a single continuous electrode. This segmentation creates multiple independent contact points with the p+-type contact region, increasing the number of hole discharge routes and reducing electrical resistance during avalanche breakdown, thereby improving avalanche ruggedness
Solution Approach 2:
Multiple upper electrodes are combined with the single p+-type contact region, creating a multi-point contact structure. This merging of multiple electrodes with the contact region increases the effective contact area and provides redundant hole discharge pathways, enhancing reliability while distributing the electrical load across multiple contact points
Data Source
AI summary
According to one embodiment, a semiconductor device includes a first electrode, first and third semiconductor regions of a first conductivity type, second and fourth semiconductor regions of a second conductivity type, a gate electrode and a second electrode. The third semiconductor region is disposed on one portion of the second semiconductor region. The fourth semiconductor region is disposed on another portion of the second semiconductor region, is positioned below the third semiconductor region. The second electrode includes first and second portions separated from each other and allowing the fourth semiconductor region to be positioned therebetween, and the third portion disposed on the first and second portions and arranged with the third semiconductor region. The first, second, and third portions are in contact with the fourth semiconductor region.