Insulated Gate Semiconductor Device with Segmented Electrodes

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Solution Overview

Problem

Conventional insulated gate semiconductor devices face issues with ON-resistance reduction and wire bonding failures due to Au/Al eutectic layer formation, which causes stress and cracks in the interlayer insulating film, and limitations in increasing the thickness of the aluminum alloy metal electrode layer for pattern miniaturization and cost-effectiveness.

Innovation Solution

The solution involves a semiconductor device with a semiconductor substrate having an element region with a lower electrode layer and an upper electrode layer, where an insulating film is used between the electrode layers, and a patterned insulating film fills the gap between the electrode portions, allowing for increased thickness and reduced ON-resistance without side etching and maintaining chip miniaturization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the thickness of the aluminum alloy metal electrode layer is increased to reduce ON-resistance, then the ON-resistance decreases, but side etching increases during patterning which prevents chip miniaturization

Engineering Contradiction:
ImproveON-resistanceVSAvoidpattern miniaturization
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent divides the metal electrode layer into multiple separate layers (first metal layer, second metal layer, third metal layer) instead of using a single thick layer. Each layer can be patterned independently with appropriate thickness, allowing the total resistance to be reduced through cumulative thickness while each individual layer maintains manufacturable dimensions for patterning without excessive side etching.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If thin gold wires are used for wire bonding, then wire bonding cost decreases, but Au/Al eutectic layer formation causes stress and cracks in the interlayer insulating film

Engineering Contradiction:
Improvewire bonding costVSAvoidinterlayer insulating film integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces a barrier metal layer (such as titanium nitride or tantalum nitride) between the aluminum alloy metal electrode layer and the gold bonding wire. This intermediary layer prevents direct contact between Au and Al, thereby preventing eutectic reaction and the associated volume expansion that causes stress and cracks in the interlayer insulating film, while still allowing effective wire bonding to be performed.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If aluminum alloy is used as the metal electrode layer material, then resistance value decreases and patterning ease improves, but wire bonding reliability deteriorates over time due to eutectic formation

Engineering Contradiction:
Improvepatterning easeVSAvoidwire bonding reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent creates a composite metal electrode structure consisting of multiple materials: an aluminum alloy layer (for low resistance and easy patterning), a barrier metal layer (for preventing eutectic reaction), and potentially additional metal layers (for optimized bonding properties). This composite structure combines the advantages of different materials while eliminating their individual disadvantages.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces ON-resistance, minimizes wire bonding impact, and prevents cracks in the interlayer insulating film, enabling efficient semiconductor device operation while maintaining chip size and cost-effectiveness.

Implementation Method 1

an insulating film which is disposed between the first metal layer and the second metal layer so as to prevent mutual diffusion between Au and Al

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

a patterned insulating film which is disposed on the lower electrode layer and fills a gap between electrode portions

Methodology Applied
Scientific EffectPhysical support:

Data Source

PatentUS7417295B2Insulated gate semiconductor device and manufacturing method thereof
Publication Date: 2008.08.26 SEMICON COMPONENTS IND LLC
  • US7417295B2 patent drawing
  • US7417295B2 patent drawing
  • US7417295B2 patent drawing

AI summary

Two metal electrode layers are provided. A first electrode layer is patterned with a minute separation distance according to an element region as in the case of the conventional case. Meanwhile, it suffices that a second electrode layer be in contact with the first electrode layer. Thus, no problems arise even if the separation distance is elongated. Specifically, the second electrode layer can be set to have a desired thickness. Moreover, by disposing a nitride film on the first electrode layer below a wire bonding region, even when volume expansion is caused by an Au/Al eutectic layer, transmission of stress to the element region can be prevented.