Semiconductor Device With Segmented Electrodes For Current Uniformity
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Solution Overview
Problem
Conventional semiconductor devices experience uneven current densities due to long current paths with high resistance, leading to thermal runaway and reduced safe operating areas, exacerbated by non-operating cells increasing resistance components.
Innovation Solution
The semiconductor device features a semiconductor substrate with a collector region, a base region separated into islands, and an emitter region, with first and second insulating films and electrodes, where the second base electrode is smaller than the second emitter electrode, allowing for even current distribution and reduced resistance paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional two-layer electrode structures are used with long current paths, then device complexity is reduced, but resistance components increase and current density becomes uneven
Solution Approach 1:
The patent segments the current path by introducing multiple emitter electrodes (first emitter electrodes and second emitter electrodes) distributed across the chip surface. This segmentation divides the long current path into shorter segments, reducing overall resistance and improving current density uniformity without significantly increasing device complexity
Solution Approach 2:
The patent transitions from a planar electrode arrangement to a three-dimensional configuration by stacking emitter electrodes at different levels (first emitter electrodes in one layer, second emitter electrodes in another layer). This dimensional change allows current to flow through multiple parallel paths, reducing resistance and enhancing current distribution uniformity
2Area of stationary object
If long current paths are used in conventional designs, then chip area is reduced, but resistance components increase leading to thermal runaway
Solution Approach 1:
The patent applies local quality by positioning second emitter electrodes specifically in regions where current density needs enhancement. The electrode configuration is optimized locally to reduce resistance in high-current-density areas, preventing thermal runaway while maintaining overall compact chip area
Solution Approach 2:
The patent merges multiple current paths by combining first emitter electrodes and second emitter electrodes into a unified electrode system. This merging creates parallel current flow paths that reduce overall resistance and distribute current more evenly, mitigating thermal runaway risk without increasing chip area
3Ease of manufacture
If conventional electrode configurations are used, then manufacturing is simpler, but safe operating area is reduced due to uneven current densities
Solution Approach 1:
The patent introduces dynamic adaptability by configuring electrodes that can accommodate varying current loads. The multi-layer electrode structure dynamically adjusts current distribution based on operating conditions, expanding the safe operating area while maintaining manufacturing simplicity through standard fabrication processes
Data Source
AI summary
The first base electrodes and the first emitter electrodes are all formed like strips, and are alternately arranged in parallel, and the area of the second emitter electrode is expanded to be larger than that of the second base electrode. With this, the number of current paths increases in each of which a current is pulled up almost straight from the emitter region to the second emitter electrode through the first emitter electrodes, thereby preventing the current densities of the entire chip from becoming uneven.