Semiconductor Device Short-Circuit Immunity via Segmented Emitter

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Solution Overview

Problem

Semiconductor devices in power converters, such as inverters, face challenges in increasing breakdown immunity to short-circuit currents, leading to thermal runaway and potential explosive destruction.

Innovation Solution

A semiconductor device structure with specific layer configurations and control electrode arrangements, where the potential of the second semiconductor layer is set to be less than that of the third semiconductor layer, reducing the collector current and preventing thermal runaway by detecting short-circuit faults and adjusting the potential of the second electrode accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the semiconductor device operates with high current capacity, then the power output is improved, but the device becomes vulnerable to thermal runaway during short-circuit events

Engineering Contradiction:
Improvepower outputVSAvoidbreakdown immunity
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The emitter is segmented into multiple emitter regions (first emitter region and second emitter region) with different doping concentrations and geometries. The first emitter region has higher doping concentration and smaller area, while the second emitter region has lower doping concentration and larger area. This segmentation allows different regions to handle different current densities, enabling high power output while distributing thermal stress to prevent thermal runaway during short-circuit events.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the emitter are assigned different local properties: the first emitter region has higher doping concentration and is positioned to handle high current density during normal operation, while the second emitter region has lower doping concentration and larger area to provide thermal stability and prevent runaway during faults. This local quality differentiation resolves the contradiction between power capacity and breakdown immunity.

Inventive Principle:
Principle #3Local quality

2Loss of energy

If the emitter area is increased to reduce on-resistance, then the conduction loss is reduced, but the device becomes more susceptible to short-circuit current damage

Engineering Contradiction:
Improveconduction lossVSAvoidshort-circuit current impact
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

The emitter is divided into regions with different doping concentrations and areas. The first emitter region with higher doping concentration and smaller area provides low on-resistance for reduced conduction loss, while the second emitter region with lower doping concentration and larger area distributes current during short-circuit events to reduce peak current density and prevent damage. This local quality differentiation simultaneously achieves low conduction loss and short-circuit immunity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The emitter is segmented into multiple functional regions that operate under different conditions. During normal operation, the high-doping first emitter region dominates conduction to minimize losses. During short-circuit events, the current distributes to the larger second emitter region, reducing peak current density and preventing catastrophic failure. This segmentation resolves the trade-off between conduction loss and short-circuit susceptibility.

Inventive Principle:
Principle #1Segmentation

3Speed

If the doping concentration in the emitter is increased to improve switch-on characteristics, then the turn-on speed is improved, but the breakdown voltage is reduced

Engineering Contradiction:
Improveturn-on speedVSAvoidbreakdown voltage
Core Design Contradiction:
SpeedVSStrength

Solution Approach 1:

The emitter is segmented into a first emitter region with higher doping concentration for fast turn-on characteristics and a second emitter region with lower doping concentration for higher breakdown voltage. During normal switching operation, the high-doping first region provides rapid carrier injection and fast turn-on. During voltage stress conditions, the low-doping second region maintains higher breakdown voltage, preventing premature breakdown. This segmentation resolves the contradiction between turn-on speed and breakdown voltage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different emitter regions are assigned different doping concentrations to optimize different performance aspects locally. The first emitter region has high doping concentration optimized for fast switching, while the second emitter region has low doping concentration optimized for high breakdown voltage. This local quality differentiation allows the device to simultaneously achieve fast turn-on and high breakdown voltage immunity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11538929B2Semiconductor device and method for controlling same
Publication Date: 2022.12.27 KK TOSHIBA
  • US11538929B2 patent drawing
  • US11538929B2 patent drawing
  • US11538929B2 patent drawing

AI summary

A semiconductor device includes first and third semiconductor layers of a first conductivity type, and second, fourth and fifth semiconductor layers of a second conductivity type. The first semiconductor layer is provided on the fifth semiconductor layer. The second semiconductor layer is provided on the first semiconductor layer. The third and fourth semiconductor layers are arranged along the second semiconductor layer. In a plane parallel to an upper surface of the second semiconductor layer, the fourth semiconductor layer has a surface area greater than a surface area of the third semiconductor layer. The device further includes first to third electrodes, and first control electrode. The first to third electrodes are electrically connected to the third to fifth semiconductor layers, respectively. The first control electrode is provided in a first trench extending into the first semiconductor layer from an upper surface of the third semiconductor layer.