Semiconductor Device With Segmented Gate Electrodes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor devices, such as MOSFETs, face challenges in achieving low on-resistance while maintaining high breakdown voltage, which is crucial for efficient power conversion applications.
Innovation Solution
The semiconductor device design incorporates annular-shaped gate electrodes and field plate electrodes surrounded by an insulating portion, allowing for increased n-type impurity concentration and enhanced channel density, thereby reducing on-resistance while maintaining breakdown voltage through strategic electrode placement and fabrication processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor device structures are used, then manufacturing is simpler, but on-resistance cannot be sufficiently reduced
Solution Approach 1:
The gate electrode is divided into multiple segments (first gate electrode and second gate electrode) separated by an insulating portion, allowing independent optimization of each segment's function. This segmentation enables the first gate electrode to control the first channel and the second gate electrode to control the second channel, thereby reducing overall on-resistance while maintaining manageable device complexity through modular design
Solution Approach 2:
The insulating portion is embedded within the semiconductor structure, surrounded by the first semiconductor region, creating a nested configuration. The gate electrodes extend inwardly of the insulating portion, forming a nested arrangement where the insulating portion is contained within the semiconductor region. This nesting allows for increased channel density without proportionally increasing device footprint
Data Source
AI summary
A semiconductor device includes a first conductivity type first semiconductor region, a second semiconductor region on the first semiconductor region, a third semiconductor region on the second semiconductor region, a first insulating portion extending inwardly of, and surrounded by, the first semiconductor region, a gate electrode extending inwardly of the first insulating portion and spaced from the second semiconductor region in a second direction that intersects a first direction extending from the first semiconductor region to the second semiconductor region, by the first insulating portion, and a first electrode including a portion spaced from the first semiconductor region in the second direction by the first insulating portion, and surrounded by the first insulating portion and the gate electrode.


