Semiconductor Device With Segmented Grooves For Data Retention

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Solution Overview

Problem

Three-dimensional non-volatile memory devices face challenges in data retention characteristics due to coupling between stacked memory cells, which affects their performance and reliability.

Innovation Solution

A semiconductor device design featuring channel layers with alternating insulating layers and grooves of different widths and depths, where conductive layers are placed in the grooves to separate data storage patterns and reduce electrical interference, improving data retention and program/erase speeds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If data storage layers of stacked memory cells are coupled to each other to simplify manufacturing processes, then manufacturing complexity is reduced, but data retention characteristics deteriorate

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoiddata retention characteristics
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent divides the continuous data storage layer into separate, isolated data storage patterns for each memory cell by introducing grooves between adjacent cells. This segmentation prevents electrical coupling between stacked memory cells while maintaining the vertical stacking architecture, thus resolving the contradiction between manufacturing simplicity and data retention characteristics

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces grooves filled with insulating material as intermediary structures between adjacent data storage layers. These grooves act as electrical isolators that prevent charge leakage and interference between stacked memory cells, enabling data retention improvement without compromising the simplified stacked manufacturing approach

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If grooves of different widths are formed between insulating layers to separate data storage patterns, then data retention characteristics are improved, but device complexity increases

Engineering Contradiction:
Improvedata retention characteristicsVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies different groove widths at different locations: wider grooves between data storage patterns requiring stronger isolation, and narrower grooves where less isolation is needed. This local differentiation optimizes data retention characteristics while minimizing overall device complexity by applying complexity only where necessary

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9136275B2Semiconductor device
Publication Date: 2015.09.15 SK HYNIX INC
  • US9136275B2 patent drawing
  • US9136275B2 patent drawing
  • US9136275B2 patent drawing

AI summary

A semiconductor device includes at least one channel layer, insulating layers stacked on top of one another while surrounding the at least one channel layer, first grooves and second grooves alternately interposed between the insulating layers, wherein the first groves have a greater width than the second grooves having a second width, and conductive layers formed in the first grooves.