Semiconductor Device with Segmented Lead Terminals for High Voltage
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Solution Overview
Problem
Existing semiconductor devices for high-voltage applications, such as voltage detection circuits in hybrid and electric vehicles, face challenges in withstanding voltages above 1,000 V due to discharge issues between lead terminals and the difficulty of miniaturizing the structure with multiple chip resistors on a mounting board.
Innovation Solution
A semiconductor device with a multichip structure comprising a first chip for voltage lowering and a second chip for signal processing, where lead terminals are spaced to withstand higher voltages, and sealed with resin to prevent discharge, allowing for a compact design by mounting chips on a die pad with optimized connections and auxiliary interconnections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple chip resistors are mounted on a mounting board to withstand high voltage, then voltage withstanding capability is improved, but device size increases and miniaturization becomes difficult
Solution Approach 1:
The voltage detection circuit is divided into two separate chips: a first chip containing voltage-dividing resistors and a second chip containing the operational amplifier. This segmentation allows each chip to be optimized for its specific function and enables compact arrangement on the mounting board while maintaining high voltage withstanding capability through proper spacing of lead terminals.
Solution Approach 2:
The patent utilizes three-dimensional space utilization by mounting chips vertically on the mounting board and arranging lead terminals in multiple rows. The lead terminals are spaced in both horizontal and vertical dimensions, effectively using spatial distribution to achieve high voltage withstanding capability without increasing the planar area of the mounting board.
2Object-affected harmful factors
If lead terminals are spaced far apart to prevent discharge, then discharge prevention is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The lead terminals are arranged asymmetrically in multiple rows with different spacing patterns. The first and second lead rows have optimized spacing to prevent discharge while maintaining compact overall dimensions. This asymmetric arrangement simplifies manufacturing by providing clear spacing rules rather than requiring complex symmetric patterns throughout.
Solution Approach 2:
The patent introduces suspension leads as intermediary elements between the high-voltage lead terminals and the circuit board ground. These suspension leads act as mediators that provide additional discharge paths and reduce the electric field intensity between main lead terminals, thereby preventing discharge while allowing more compact terminal spacing.
3Area of stationary object
If a compact multichip structure is used, then device size is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The first chip and second chip are designed with pre-defined electrode patterns and connection configurations. The voltage-dividing resistors on the first chip are pre-configured with specific connection points, and the operational amplifier on the second chip has pre-established input/output terminals. This preliminary design simplifies the mounting process by reducing the need for complex routing and connection decisions during assembly, thereby lowering manufacturing precision requirements despite the compact size.
Data Source
AI summary
One embodiment provides a semiconductor device having a first chip for lowering an input voltage and a second chip for performing signal processing, mounted on a die pad. Lead terminals are divided into a first lead row and a second lead row. The first lead row are connected with the first chip, the first chip are connected with the second chip or the second lead row, and the second chip are connected with the second lead row. A distance between the lead terminals of the first lead row is set longer than a distance between the lead terminals of the second lead row, and a sealing resin is provided to fill at least between the lead terminals of the first lead row.