Semiconductor Structure with Segmented Stacks for BVdss and Ron,sp Trade-off
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Solution Overview
Problem
Semiconductor structures face a challenge in achieving a balance between breakdown voltage (BVdss) and specific on-state resistance (Ron,sp) due to methods that decrease dopant concentration and increase drift length, resulting in an undesirable trade-off for a desired figure of merit (FOM).
Innovation Solution
A semiconductor structure comprising a substrate with source/drain regions and stack structures formed by dielectric and conductive layers, where the first stack structure is positioned between the source/drain regions and the second stack structure is formed on top, optimizing electrical field distribution and resistance, allowing for a better trade-off between BVdss and Ron,sp.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dopant concentration of drain region is decreased and drift length is increased to increase breakdown voltage, then breakdown voltage is improved, but specific on-state resistance is increased
Solution Approach 1:
The gate structure is segmented into multiple stacks (first stack structure with first dielectric layer and first conductive layer, second stack structure with second dielectric layer and second conductive layer). Each stack independently controls the electrical field in different regions, allowing optimization of both breakdown voltage and on-state resistance without trade-off
Solution Approach 2:
Different dielectric layers (first dielectric layer with first breakdown voltage, second dielectric layer with second breakdown voltage) are used in different vertical regions to create locally optimized electrical field control. This allows the structure to achieve high overall breakdown voltage while maintaining low resistance through localized field management
Data Source
AI summary
A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises a substrate, a first source/drain region, a second source/drain region, a first stack structure and a second stack structure. The first source/drain region is formed in the substrate. The second source/drain region is formed in the substrate. The first stack structure is on the substrate between the first source/drain region and the second source/drain region. The first stack structure comprises a first dielectric layer and a first conductive layer on the first dielectric layer. The second stack structure is on the first stack structure. The second stack structure comprises a second dielectric layer and a second conductive layer on the second dielectric layer.