Semiconductor Contact Formation via Selective Etching
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Solution Overview
Problem
Current semiconductor manufacturing processes for forming contact structures have low yield due to the complexity and inefficiency of the back end of the line (BEOL) process, particularly for high aspect ratio contact plugs, and result in conductivity issues between upper and lower contact structures formed in different steps.
Innovation Solution
A method involving a hard mask on a metal gate, where etching gases with different etching rates are used to selectively etch the hard mask and dielectric layers, allowing for simultaneous formation of contacts corresponding to the metal gate and source/drain regions, thereby reducing manufacturing steps and replacing the conventional 0th metal layer and lower contact structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If discrete contact structures are formed in separate steps, then the manufacturing process can be completed, but the yield is low and conductivity is affected due to barrier layers
Solution Approach 1:
The patent merges the formation of upper and lower contact structures into a single simultaneous etching process. By using a shared etch process with appropriate selectivity ratios, both contact structures are formed in one step, eliminating the barrier layer that would otherwise be deposited between separately formed contacts, thereby improving both conductivity and yield
2Manufacturing precision
If double patterning technique (2P2E) is used to form contact structures, then the manufacturing precision can be improved, but the device complexity and manufacturing steps increase
Solution Approach 1:
The patent employs a single etching process that serves multiple functions: forming both upper and lower contact structures, achieving the required precision through selective etching rates, and eliminating the need for separate patterning steps. This multi-functional approach reduces manufacturing complexity while maintaining precision
3Ease of manufacture
If barrier layer is deposited between upper and lower contact structures, then the manufacturing process can be completed, but the conductivity of the contact is affected
Solution Approach 1:
The patent performs preliminary action by forming both contact structures simultaneously before any barrier layer deposition can occur. The etching process is designed to complete both contact formations in one step, preventing the need for subsequent barrier layer deposition that would compromise conductivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the yield of contact structures by simplifying the manufacturing process and improving conductivity by forming contacts simultaneously, reducing the number of steps required and eliminating the barrier layer between the upper and lower contact structures.
Implementation Method 1
uses etching gases with different etching rates to selectively etch the hard mask and the dielectric layer disposed above
Data Source
AI summary
The present invention provides a manufacturing method of a semiconductor structure, comprising the following steps. First, a substrate is provided, a first dielectric layer is formed on the substrate, a metal gate is disposed in the first dielectric layer and at least one source/drain region (S/D region) is disposed on two sides of the metal gate, a second dielectric layer is then formed on the first dielectric layer, a first etching process is then performed to form a plurality of first trenches in the first dielectric layer and the second dielectric layer, wherein the first trenches expose each S/D region. Afterwards, a salicide process is performed to form a salicide layer in each first trench, a second etching process is then performed to form a plurality of second trenches in the first dielectric layer and the second dielectric layer, and the second trenches expose the metal gate.