Semiconductor Device Manufacturing via Selective Etching and Layer Stacking
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Solution Overview
Problem
Current semiconductor device manufacturing methods fail to achieve a balance between small area occupation, high integration, high speed operation, low power consumption, high productivity, and high manufacturing yield, particularly in the use of oxide semiconductor materials.
Innovation Solution
A method for manufacturing a semiconductor device involves forming a contact plug by selectively etching layers to create openings and filling them with a conductor, using tungsten for conductive layers and titanium or titanium nitride for specific layers, and incorporating an oxide semiconductor layer with materials like In, Zn, and M (M being Al, Ti, Sn, Ga, Y, Zr, La, Ce, Nd, or Hf) to facilitate electrical connection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional manufacturing methods are used, then manufacturing simplicity is maintained, but device area occupation is large and integration is low
Solution Approach 1:
The manufacturing process is divided into multiple selective etching steps, each targeting specific layers (first conductive layer, first insulating layer, second conductive layer, third conductive layer) with different masks and etching conditions. This segmentation allows precise control over opening formation in each layer independently, enabling compact device layout while maintaining manufacturing feasibility through systematic process breakdown
Solution Approach 2:
The patent employs multi-layer stacking in the vertical dimension (first conductive layer, first insulating layer, second conductive layer, third conductive layer) to achieve high integration. By utilizing the vertical dimension for layer arrangement and forming openings that penetrate through multiple layers, the device achieves compact area occupation while maintaining functional complexity through three-dimensional structural organization
2Use of energy by moving object
If oxide semiconductor materials are used, then power consumption is reduced, but manufacturing yield and reliability are compromised
Solution Approach 1:
The patent specifies precise material compositions for oxide semiconductors (In, Zn, and M where M is Al, Ti, Sn, Ga, Y, Zr, La, Ce, Nd, or Hf) and controls etching parameters (selective etching with different masks for different layers) to achieve reliable manufacturing. By optimizing material parameters and process parameters, the patent maintains low power consumption characteristics of oxide semiconductors while improving manufacturing yield through controlled and repeatable processing
Solution Approach 2:
The patent uses composite material structures including oxide semiconductor layers combined with specific conductive materials (tungsten for conductive layers, titanium or titanium nitride for specific layers) and insulating materials. This composite approach leverages the advantages of each material: oxide semiconductors provide low power consumption, tungsten provides reliable conductivity, and titanium/titanium nitride provides appropriate interface properties, achieving both low power consumption and high manufacturing yield
3Reliability
If simple contact plug formation is used, then productivity is high, but electrical connection reliability is insufficient
Solution Approach 1:
The patent forms openings in the first conductive layer, first insulating layer, second conductive layer, and third conductive layer through selective etching before filling with conductor material. This preliminary preparation of precisely controlled openings with appropriate dimensions and positions ensures reliable electrical connection pathways are established beforehand, allowing subsequent filling to proceed efficiently without rework, thus maintaining both high reliability and productivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of semiconductor devices that occupy a small area, are highly integrated, operate at high speeds, consume low power, have high productivity, and high manufacturing yield, while maintaining reliable electrical characteristics.
Implementation Method 1
providing an opening in the second insulating layer by selective etching using the resist mask as a mask; providing an opening in the third conductive layer and making the resist mask disappear by selective etching using the second insulating layer as a mask
Implementation Method 2
filling, with a conductor, the opening penetrating the first conductive layer, the first insulating layer, the second conductive layer, and the third conductive layer which is provided through the above steps
Data Source
AI summary
To provide a semiconductor device which occupies a small area and is highly integrated. A first conductive layer is formed; a first insulating layer is formed over the first conductive layer; a second conductive layer is formed over the first insulating layer using the same material as the first conductive layer; a third conductive layer is formed over the second conductive layer; a second insulating layer is formed over the third conductive layer; a resist mask is formed over the second insulating layer; etching is successively performed from the upper layer and an opening is formed in the first conductive layer and the diameter of the opening in the second conductive layer is increased in the same step; and a contact hole where an upper surface of the first conductive layer is exposed is formed by etching the first insulating layer.