Semiconductor Selector Layer for Integrated Self-Selecting Memory
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Solution Overview
Problem
Existing semiconductor devices struggle to integrate memory and selector functions into a single component, necessitating separate manufacturing steps and limiting integration density.
Innovation Solution
A semiconductor device incorporating a tunnel insulating layer, charge blocking layer, and selector layer, which allows it to function as a self-selecting memory, switching between resistance states based on trapped charges and threshold voltages, thereby combining memory and selector functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate memory and selector components are used, then each component can be optimized independently, but device complexity and manufacturing steps increase
Solution Approach 1:
The patent combines memory and selector functions into a single integrated structure. The memory cell includes a tunnel insulating layer, selector layer, and charge blocking layer that work together to provide both memory storage and selector functionality. This merging eliminates the need for separate manufacturing steps for distinct memory and selector components, reducing overall device complexity while maintaining functional optimization.
Solution Approach 2:
The selector layer serves dual purposes: it acts as a threshold switch for memory cell selection and simultaneously contributes to the memory storage mechanism through charge trapping. This multi-functionality allows a single component to fulfill multiple roles, reducing the total number of components and manufacturing steps required while maintaining independent optimization of each function.
2Adaptability or versatility
If separate memory and selector components are used, then functional separation is achieved, but integration density decreases
Solution Approach 1:
The patent merges memory and selector functions into a single vertical stack structure, where the tunnel insulating layer, selector layer, and charge blocking layer are stacked together. This integration allows both functions to coexist in a compact footprint, significantly increasing integration density while maintaining functional separation through distinct layer assignments and operational mechanisms.
Solution Approach 2:
The selector layer is nested within the memory cell structure, with the charge blocking layer positioned adjacent to the second conductive layer and the tunnel insulating layer adjacent to the first conductive layer. This nested arrangement allows the selector functionality to be embedded within the memory storage structure, maximizing space utilization and integration density while preserving functional independence.
3Ease of manufacture
If conventional memory structures are used, then manufacturing is simpler, but current leakage between cells increases
Solution Approach 1:
The charge blocking layer acts as an intermediary component that prevents current leakage between adjacent memory cells. Positioned adjacent to the second conductive layer, this layer blocks parasitic current paths while maintaining the intended current flow through the selected cell. The tunnel insulating layer similarly serves as an intermediary that prevents charge leakage from the first conductive layer, collectively eliminating current leakage issues without complicating the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device simplifies manufacturing by integrating memory and selector functions, enhances integration density, and reduces current leakage between cells.
Implementation Method 1
a tunnel insulating layer interposed between the first conductive layer and the second conductive layer
Implementation Method 2
the semiconductor device switches between different resistance states depending on whether charges are trapped to trap sites of the selector layer
Implementation Method 3
a charge blocking layer interposed between the first conductive layer and the second conductive layer and disposed adjacent to the second conductive layer
Data Source
AI summary
A semiconductor device may include: a first conductive layer; a second conductive layer spaced apart from the first conductive layer; a tunnel insulating layer interposed between the first conductive layer and the second conductive layer and disposed adjacent to the first conductive layer; a charge blocking layer interposed between the first conductive layer and the second conductive layer and disposed adjacent to the second conductive layer; and a selector layer interposed between the tunnel insulating layer and the charge blocking layer, wherein the semiconductor device functions as a self-selecting memory.


