Self-Aligned Contact Formation in Semiconductor Manufacturing

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Solution Overview

Problem

The miniaturization of semiconductor devices leads to misalignment between upper-layer and lower-layer wirings, resulting in partial or complete lack of connection between contacts and wirings due to misalignment of contact openings, which affects the electrical connection and resistance in multilayer wiring structures.

Innovation Solution

A manufacturing method that involves forming a first insulating film, creating trenches using a hard mask and spacer films to ensure precise alignment of contact openings with wiring trenches, allowing for self-aligned contact formation that reduces misalignment and increases contact area, thereby minimizing contact resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If line width is decreased for miniaturization, then device density is improved, but misalignment between upper-layer and lower-layer wirings occurs

Engineering Contradiction:
Improvedevice densityVSAvoidalignment precision
Core Design Contradiction:
Area of moving objectVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming a first mask pattern and then using it to create a second mask pattern through spacer formation. This preliminary structuring establishes precise geometric relationships before the final contact opening formation, ensuring that contacts are automatically aligned with wiring trenches even when line widths are reduced for miniaturization.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary element - the spacer film - that mediates between the first mask pattern and the final contact opening. The spacer acts as a geometric translator that converts the wiring trench dimensions into precisely positioned contact openings, eliminating direct alignment dependency and solving the misalignment problem caused by miniaturization.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If contact opening alignment is improved, then connection reliability is improved, but manufacturing process complexity increases

Engineering Contradiction:
Improveconnection reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements self-service through self-aligned contact formation. The spacer film automatically positions the contact openings relative to the wiring trenches based on geometric constraints, eliminating the need for separate alignment operations. This self-aligning mechanism improves connection reliability while avoiding the complexity of multiple alignment steps.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent segments the contact formation process into distinct stages: first mask formation, spacer deposition, and contact opening etching. By dividing the process into modular segments with clear functional boundaries, the manufacturing complexity is managed systematically while achieving high precision through the geometric relationships established at each stage.

Inventive Principle:
Principle #1Segmentation

3Reliability

If contact area is increased, then contact resistance is reduced, but trench shape control becomes more difficult

Engineering Contradiction:
Improvecontact resistanceVSAvoidtrench shape control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent controls trench shape by adjusting process parameters such as etch conditions and spacer thickness rather than changing the fundamental formation mechanism. By modifying these parameters, the contact area can be optimized to reduce contact resistance while maintaining precise trench shape control through the self-aligned geometric constraints established by the spacer structure.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9418887B2Method of manufacturing semiconductor device
Publication Date: 2016.08.16 KIOXIA CORP
  • US9418887B2 patent drawing
  • US9418887B2 patent drawing
  • US9418887B2 patent drawing

AI summary

According to one embodiment, a method of manufacturing a semiconductor device is provided. The method includes forming a first insulating film, forming a first mask extending in first direction on the first insulating film, etching the first insulating film using the first mask, resulting in trenches extending in a first direction, forming a second mask on the trenches and the first mask, etching the first insulating film using the second mask and the first mask to form contact openings extending from the trenches.