Semiconductor Package Self-Alignment Using Fusion-Bonded Solder Bumps
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Solution Overview
Problem
Current semiconductor packaging methods, such as fan-out packaging, lack efficient and economical methods for high-precision placement and position fixation of chips, relying on expensive equipment with high costs, slow speeds, and low positioning accuracy.
Innovation Solution
A semiconductor packaging method involving a semiconductor device with an active surface and a passive surface, where the passive surface has alignment bonding pads and the active surface is protected by a film. Alignment solder bumps on a carrier are fused with the bonding pads to accurately align and fix the semiconductor device, followed by a molding layer formation to encapsulate and secure the device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If expensive placement machines are used for chip placement, then positioning accuracy is improved, but equipment cost increases and placement speed decreases
Solution Approach 1:
The semiconductor device performs self-alignment through the fusion bonding process itself. The alignment bonding pads on the device automatically align with and bond to the alignment solder bumps on the carrier during fusion bonding, eliminating the need for external expensive placement machines. This self-service mechanism achieves high positioning accuracy without requiring complex external equipment.
Solution Approach 2:
The patent replaces the mechanical placement machine system with a fusion bonding system. Instead of using mechanical positioning and placement equipment, the invention uses thermal fusion bonding of alignment features (solder bumps bonding to bonding pads) to achieve both positioning and fixation, substituting a complex mechanical system with a simpler thermal-bonding process.
2Manufacturing precision
If expensive placement machines are used for chip placement, then positioning accuracy is improved, but placement speed decreases
Solution Approach 1:
The self-alignment mechanism during fusion bonding eliminates the sequential operations of manual or machine placement followed by separate bonding steps. The alignment and bonding occur simultaneously in a single process step, significantly improving placement speed while maintaining high positioning accuracy through the self-aligning nature of the fusion bonding process.
3Reliability
If traditional placement methods are used, then equipment requirements are met, but process cost increases and efficiency decreases
Solution Approach 1:
The patent merges the alignment function and the bonding function into a single integrated process step. The alignment bonding pads serve dual purposes: providing mechanical alignment references and serving as bonding sites. This merging of functions eliminates the need for separate alignment and bonding processes, reducing equipment requirements and process costs while maintaining reliable position fixation.
Solution Approach 2:
The alignment bonding pads perform multiple functions: they act as alignment references during placement, serve as bonding sites for position fixation, and provide electrical connection points. This multi-functionality reduces the number of separate components and processes needed, lowering overall process cost while ensuring reliable position fixation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables accurate self-alignment of semiconductor devices, reducing the requirement for precise placement, thereby improving processing speed and efficiency while reducing costs. It also enhances the protection of the active surface and improves the yield of subsequent processes.
Implementation Method 1
the alignment solder bumps and the alignment bonding pads are basically aligned, and fusion bonding is carried out on the alignment solder bumps and the alignment bonding pads, so that the semiconductor device is accurately aligned and fixed to the carrier
Data Source
AI summary
The invention relates to a semiconductor packaging method, a semiconductor assembly and electronic device. In some embodiments, alignment solder bumps and alignment bonding pads are subjected to fusion bonding, in which the surface tension generated by the alignment solder bumps in a fusion state automatically pulls a semiconductor device to a target position on a carrier, and accurately fixes the semiconductor device at the target position. Thus, the semiconductor device is prevented from drifting and rotating in a molding process, and the yield of subsequent processing can be effectively improved. Further, the requirement on the precision of placing the semiconductor device on the carrier is reduced, greatly simplifying and speeding-up picking and placing operations. In addition, an active surface of the semiconductor device are pre-sealed to avoid height restriction of connecting terminals thereon, improve the chemical resistance of the connecting terminals, and protect the reliability of the active surface.


