Self-Read Write Pulses for DRAM Data Integrity
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Solution Overview
Problem
DRAM memory semiconductor devices face data loss over time due to the need for regular refresh operations to prevent information disappearance, which increases power consumption and complexity.
Innovation Solution
A semiconductor device with an information update control circuit generating self-read and self-write pulses, and a column control circuit to manage read and write operations, minimizing the need for external refresh by updating selection information on word line usage within the device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If regular refresh operations are performed to prevent data loss in DRAM, then data integrity is maintained, but power consumption increases
Solution Approach 1:
The patent applies preliminary action by performing self-read and self-write operations immediately after an active operation is detected. The information update control circuit generates self-read and self-write pulses that trigger column read and write operations within the retention time window, proactively updating selection information before data degradation occurs. This preliminary updating reduces the need for continuous external refresh operations, thereby lowering power consumption while maintaining data integrity.
Solution Approach 2:
The patent implements self-service through the self-read and self-write operations that automatically update selection information in response to active operations. When an active operation is detected, the information update control circuit autonomously generates control pulses to read and write selection information without requiring external intervention. This self-updating mechanism reduces dependency on external refresh operations, decreasing power consumption while ensuring data remains within retention time limits.
2Reliability
If regular refresh operations are performed to prevent data loss in DRAM, then data integrity is maintained, but circuit complexity increases
Solution Approach 1:
The patent applies universality by utilizing the existing column read and write circuits for their dual purpose: normal data operations and self-updating of selection information. The column control circuit performs both traditional data read/write functions and the additional function of updating selection information during self-read and self-write operations. This multi-functionality eliminates the need for separate dedicated refresh circuitry, reducing overall circuit complexity while maintaining data integrity through proactive updates.
Solution Approach 2:
The patent merges the refresh function with the existing column read and write operations. Instead of implementing a separate refresh mechanism, the invention combines the selection information updating process with the column control circuit's normal operations. The column control circuit integrates both data handling and selection information management, consolidating multiple functions into a single circuit block and reducing overall system complexity.
3Loss of information
If selection information is updated frequently to track word line usage, then data freshness is improved, but operation complexity increases
Solution Approach 1:
The patent implements periodic action by updating selection information only at specific intervals triggered by active operations rather than continuously. The information update control circuit monitors for active operation pulses and generates self-read and self-write pulses periodically whenever such events occur. This event-driven periodic updating ensures selection information remains fresh and accurate while avoiding unnecessary continuous updates, thereby simplifying the operational complexity.
Solution Approach 2:
The patent applies feedback through the information update control circuit that monitors active operation pulses and uses this feedback to trigger self-read and self-write operations. The circuit detects when an active operation occurs and automatically responds by updating selection information through coordinated column operations. This feedback mechanism ensures data freshness is maintained dynamically based on actual usage patterns without requiring complex continuous monitoring or manual control.
Data Source
AI summary
A semiconductor device includes an information update control circuit configured to generate a self-read pulse for a self-read operation, a self-write pulse for a self-write operation, and an information update section signal that is activated during an information update section when an active operation is performed, and a column control circuit configured to receive the self-read pulse and the self-write pulse, to generate a read column strobe pulse for outputting data or selection information data stored in a core circuit when the self-read operation is performed based on the self-read pulse or the read operation is performed according to the read pulse, and to generate a write column strobe pulse for storing the data or the selection information data in the core circuit when the self-write operation is performed based on the self-write pulse or the write operation is performed according to the write pulse.