Semiconductor Storage Sensing Circuit Capacitance Balance

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Solution Overview

Problem

Existing semiconductor storage devices face challenges in maintaining capacitance balance between sensing and reference lines, leading to increased noise susceptibility and area limitations, which results in additional layout area and increased design and chip costs due to the need for independent column switching gates.

Innovation Solution

The semiconductor storage device incorporates a sensing circuit that electrically connects column trees to sensing and reference lines in response to control signals, eliminating the need for column switching gates by using the reference data line as the data line, thereby maintaining capacitance balance and reducing chip area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If independent column switching gates are used to connect column trees to sensing and reference lines, then the capacitance balance can be maintained, but the chip area and circuit complexity increase

Engineering Contradiction:
Improvecapacitance balanceVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the column switching gate functionality into the sensing circuit itself. The sensing circuit is configured to automatically connect the first column tree to the sensing line and the second column tree to the reference sensing line during read operations, eliminating the need for separate independent column switching gates while maintaining capacitance balance between the sensing and reference paths

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The sensing circuit is designed to perform multiple functions: it senses data from selected memory cells while simultaneously maintaining capacitance balance by connecting unselected column trees to the reference sensing line. This multi-functionality replaces what would traditionally require separate dedicated switching circuits for each column tree

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Speed

If capacitances are placed at different positions in the differential amplifier, then the read speed can be improved, but the noise resistance decreases

Engineering Contradiction:
Improveread speedVSAvoidnoise susceptibility
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent applies equipotentiality by ensuring that both the sensing line and reference sensing line have equal capacitance values through the symmetric connection of column trees. By connecting the first column tree to the sensing line and the second column tree (with identical configuration) to the reference sensing line, the differential amplifier operates with balanced capacitances at both inputs, improving noise rejection while maintaining read speed

Inventive Principle:
Principle #12Equipotentiality

3Reliability

If additional column switching gates are added to manage multiple column trees, then the capacitance balance is maintained, but the device complexity increases

Engineering Contradiction:
Improvecapacitance balanceVSAvoidswitching circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the column switching control logic directly within the sensing circuit structure. The sensing circuit includes internal switching mechanisms that automatically route signals from the first and second column trees to the sensing and reference sensing lines respectively, eliminating the need for separate external column switching gates and reducing overall device complexity

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7848160B2Semiconductor storage device and method for operating the same
Publication Date: 2010.12.07 SAMSUNG ELECTRONICS CO LTD
  • US7848160B2 patent drawing
  • US7848160B2 patent drawing
  • US7848160B2 patent drawing

AI summary

A semiconductor storage device includes a plurality of memory cells connected to first and second column trees, and a sensing circuit reading data from the memory cells. The sensing circuit performing a read operation by electrically connecting the column tree, which is connected to a read-selected memory cell, to a sensing node and electrically connecting the column tree, which is connected to a non-selected memory cell, to a reference sensing line.