Semiconductor Circuit Setting Register for Test Adaptability

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Solution Overview

Problem

The increasing variability in specifications for semiconductor integrated circuits across different users leads to higher costs and complexity in test systems and management, as existing technologies require multiple shipping tests and multi-parameter loading to accommodate various storage modes, such as QLC and TLC modes, resulting in inefficient and costly processes.

Innovation Solution

A semiconductor integrated circuit design that includes a memory region storing multiple setting conditions, a selection circuit to choose the appropriate condition, and a setting register to set operating conditions, allowing for selection and storage of specific settings based on user requirements, thereby reducing the need for multiple shipping tests and eliminating the need for multi-parameter loading.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple shipping tests are prepared to correspond to different user specifications and storage modes, then the semiconductor integrated circuit can meet various user requirements, but the costs for implementing the test system and management increase

Engineering Contradiction:

Improveadaptability to different user specificationsVSAvoidcomplexity of test system

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal test system that can handle multiple storage modes (QLC, TLC, SLC) and user specifications through a single unified platform. The system uses a common test architecture with configurable test programs that adapt to different requirements, eliminating the need for separate dedicated test systems for each storage mode while maintaining full compatibility across all specifications.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The test system dynamically adjusts test parameters based on the detected storage mode and user specifications. By changing test parameters such as voltage levels, timing sequences, and data patterns according to the specific storage mode being tested, the system achieves adaptability to different user requirements without requiring separate hardware configurations for each mode.

Inventive Principle:

Principle #35Parameter changes

2Adaptability or versatility

If multiple shipping tests are prepared for different storage modes, then various storage modes can be tested, but the costs for management increase

Engineering Contradiction:

Improvecoverage of storage modesVSAvoidmanagement time

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The test system performs preliminary detection of the storage mode during the initial test phase, automatically identifying whether the semiconductor integrated circuit uses QLC, TLC, SLC, or other storage modes. This preliminary action enables the system to automatically select and configure the appropriate test parameters without requiring manual intervention or separate management processes for each storage mode.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The test system automatically adapts to different storage modes and user specifications without requiring external management intervention. The system self-configures test parameters, selects appropriate test programs, and manages the testing process autonomously based on the detected storage mode, thereby eliminating the need for complex manual management of multiple test configurations.

Inventive Principle:

Principle #25Self-service

3Adaptability or versatility

If multi-parameter loading is performed to accommodate various storage modes, then different storage modes can be supported, but the process becomes inefficient and costly

Engineering Contradiction:

Improvesupport for storage modesVSAvoidtesting efficiency

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The test system performs preliminary detection of the storage mode before executing the main testing sequence. By identifying the storage mode in advance, the system can pre-load the appropriate test parameters and configurations, eliminating the need for time-consuming multi-parameter loading during the actual testing process and thereby improving overall testing efficiency.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The test system dynamically adjusts its operation based on the detected storage mode, transitioning from a static multi-parameter loading approach to a dynamic adaptive approach. The system automatically modifies test parameters, voltage levels, and timing sequences in real-time according to the specific storage mode being tested, enabling efficient support for multiple storage modes without the overhead of repeated parameter loading.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS11733886B2Semiconductor integrated circuit and method of examining the semiconductor integrated circuit

Publication Date: 2023.08.22 KIOXIA CORP

AI summary

According to one embodiment, a semiconductor integrated circuit includes a memory region, a selection circuit, a setting register, and a setting circuit. The memory region stores plural kinds of setting conditions. The selection circuit selects a particular setting condition from the plural kinds of the setting conditions to read the particular setting condition out of the memory region. The setting register stores the particular setting condition read out of the memory region. The setting circuit refers to the particular setting condition stored in the setting register to set an operating condition.