Semiconductor Device Shallow Accumulation Region
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Solution Overview
Problem
Conventional semiconductor devices with high concentration n-type regions face challenges in optimizing turn-on di/dt without excessive increase, leading to unstable operations and increased ON voltage.
Innovation Solution
A semiconductor device design featuring a semiconductor substrate with a drift region, an emitter region, a base region, and an accumulation region of specific impurity concentrations and distributions, including trench sections and a flat region in the accumulation region to control impurity concentration and depth, thereby managing turn-on di/dt and reducing ON voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an n-type region of high concentration is formed below a p-type base region, then device characteristics are improved, but turn-on di/dt increases excessively
Solution Approach 1:
The patent applies local quality by creating an accumulation region with specific impurity concentration (1.0×10^17 to 1.0×10^18 atoms/cm³) positioned between the base region and drift region. This localized modification of impurity concentration in a specific region (the accumulation region) allows improvement of device characteristics while controlling turn-on di/dt, rather than uniformly modifying the entire structure.
Solution Approach 2:
The patent employs parameter changes by precisely controlling the impurity concentration in the accumulation region to be within a specific range (1.0×10^17 to 1.0×10^18 atoms/cm³) and positioning it at a specific depth (0.5 to 2.0 μm from the surface). By adjusting these parameters, the patent achieves optimal device characteristics while suppressing excessive turn-on di/dt.
2Reliability
If high concentration n-type region is formed, then device characteristics are improved, but ON voltage increases
Solution Approach 1:
The patent introduces an accumulation region with moderate impurity concentration (1.0×10^17 to 1.0×10^18 atoms/cm³) positioned between the base region and drift region. This localized modification improves device characteristics without the excessive ON voltage increase that would result from forming a high concentration n-type region throughout the entire structure.
Solution Approach 2:
By controlling the impurity concentration in the accumulation region to be within a specific range and positioning it at a specific depth (0.5 to 2.0 μm from the surface), the patent optimizes device characteristics while maintaining acceptable ON voltage levels, avoiding the trade-off that would exist with uniform high concentration doping.
3Reliability
If accumulation region with high impurity concentration is formed, then device characteristics are improved, but turn-on di/dt increases excessively
Solution Approach 1:
The patent precisely controls the impurity concentration in the accumulation region to be within the range of 1.0×10^17 to 1.0×10^18 atoms/cm³, which is lower than conventional high concentration n-type regions. Additionally, the accumulation region is positioned at a specific depth (0.5 to 2.0 μm from the surface). These parameter optimizations improve device characteristics while suppressing excessive turn-on di/dt.
Solution Approach 2:
The patent creates a localized accumulation region with specific impurity concentration positioned between the base region and drift region, rather than forming a high concentration region throughout. This localized approach with controlled parameters achieves the desired device characteristics without the harmful effect of excessive turn-on di/dt.
Data Source
AI summary
A semiconductor device includes: a semiconductor substrate including a drift region of a first conductivity type; an emitter region of the first conductivity type provided above the drift region inside the semiconductor substrate and having an impurity concentration higher than the drift region; a base region of a second conductivity type provided between the emitter region and the drift region inside the semiconductor substrate; an accumulation region of the first conductivity type provided between the base region and the drift region inside the semiconductor substrate and having an impurity concentration higher than the drift region; and a plurality of trench sections provided to pass through the emitter region, the base region and the accumulation region from an upper surface of the semiconductor substrate and provided with a conductive section therein. A length of the accumulation region in a depth direction of the semiconductor substrate is less than 1.5 μm.