Semiconductor Shape Localization for Multilayer Overlay Measurement

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current semiconductor examination processes face challenges in accurately registering images of multiple layers due to overlay errors, leading to invalid measurements and poor control of manufacturing processes.

Innovation Solution

A computerized system and method for examining semiconductor specimens that utilize template images and masks to identify and register reference polygons in inspection images, determining shifts for each layer to improve image registration and overlay measurement.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional image registration methods are used for multiple layers, then the examination process can be completed, but overlay errors cause inaccurate registration and invalid measurements

Engineering Contradiction:
Improveoverlay measurement accuracyVSAvoidregistration accuracy
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent segments the image registration process into layer-specific operations. Each layer is registered independently using layer-specific reference polygons and transformation parameters, rather than applying a single global registration to all layers. This segmentation allows the system to account for different overlay errors in different layers, improving both measurement precision and registration reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by using layer-specific registration parameters and reference polygons tailored to each individual layer. Each layer receives customized registration treatment based on its specific characteristics and overlay errors, rather than a uniform approach. This local optimization ensures that measurements for each layer are accurate despite varying overlay conditions across layers.

Inventive Principle:
Principle #3Local quality

2Reliability

If multiple examination steps are performed for different layers and locations, then comprehensive quality control is achieved, but processing time and complexity increase

Engineering Contradiction:
Improvequality control comprehensivenessVSAvoidexamination processing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by pre-defining reference polygons and extracting template images from each layer during the recipe setup phase. These pre-processed elements are stored and reused during runtime examination, eliminating the need to perform complex image processing from scratch for each examination step. This preliminary preparation significantly reduces processing time while maintaining comprehensive quality control.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses template images copied from reference polygons as search patterns for identifying corresponding features in inspection images. Instead of performing complex image analysis each time, the system creates simplified template copies that can be rapidly matched and compared, reducing computational complexity and processing time while maintaining examination comprehensiveness.

Inventive Principle:
Principle #26Copying

3Measurement precision

If template images and masks are used for shape localization, then registration precision is improved, but device complexity increases

Engineering Contradiction:
Improveshape localization accuracyVSAvoidimage processing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts template images and masks from reference polygons during recipe setup. By taking out these essential features in advance and storing them as separate, reusable components, the system simplifies the runtime processing. The extraction process creates compact template representations that capture the essential shape information needed for accurate localization, reducing the complexity of real-time image processing while maintaining high precision.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12423798B2Shape localization for examining a semiconductor specimen
Publication Date: 2025.09.23 APPL MATERIALS ISRAEL LTD
  • US12423798B2 patent drawing
  • US12423798B2 patent drawing
  • US12423798B2 patent drawing

AI summary

There is provided a system and method of examining a specimen comprising a first layer and a second layer. The method comprises obtaining a recipe including a template image for each reference polygon in a reference image and a template mask indicative of proximity of a set of locations in the template image to an edge of the reference polygon; obtaining an inspection image in runtime; identifying first inspection polygons in the inspection image corresponding to the first reference polygons using template images and template masks thereof; determining a first shift for the first layer based on the first locations, and registering the first reference polygons with the inspection image based on the first shift. Similarly, a second shift for the second layer can be determined, and the second reference polygons can be registered with the inspection image based on the second shift.