Semiconductor Shared Contact Plug With Etch-Stop Layer

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Solution Overview

Problem

The increasing complexity of semiconductor device fabrication processes, particularly in lithography, hinders the realization of highly integrated semiconductor devices.

Innovation Solution

A semiconductor device design featuring a transistor with a gate insulating pattern, gate electrode, impurity regions, and an etch-stop layer between the gate electrode and shared contact plugs, along with conductive patterns that ensure electrical connectivity and suppress current leakage, is proposed. The etch-stop layer is made of materials like silicon nitride, silicon carbon nitride, or silicon oxynitride, and spacers are used to enhance electrical reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If higher integration of semiconductor devices is pursued to satisfy consumer demands, then integration density is improved, but fabrication process complexity increases and process margin is reduced

Engineering Contradiction:
Improveintegration densityVSAvoidfabrication process complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The contact structure is segmented into multiple conductive patterns (first conductive pattern and second conductive pattern) with different top surface heights. This segmentation allows selective electrical connection to different regions (impurity region and gate electrode) while simplifying the overall fabrication process by using standard photolithography and etching techniques rather than more complex 3D structuring methods.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The etch-stop layer acts as an intermediary element positioned between the gate electrode and the shared contact plug. This intermediary layer prevents direct contact and potential current leakage between the gate electrode and the first conductive pattern, while still allowing the structure to be formed using conventional fabrication processes. The spacer similarly serves as an intermediary to enhance electrical isolation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If shared contact plugs are used to connect gate electrode and impurity regions, then device structure is simplified, but current leakage may occur between gate electrode and contact plug

Engineering Contradiction:
Improvecontact structure complexityVSAvoidelectrical reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The etch-stop layer is introduced as an intermediary barrier between the gate electrode and the first conductive pattern of the shared contact plug. This layer physically separates the gate electrode from the conductive material that would otherwise directly contact it, preventing current leakage while maintaining the shared contact structure's simplicity. The spacer provides additional intermediary isolation on the sidewall.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The etch-stop layer is strategically positioned only where needed - between the gate electrode and the first conductive pattern - to provide local electrical isolation. This localized approach maintains electrical connectivity where required (through the second conductive pattern to the gate electrode) while preventing leakage only in the specific region where direct contact would be problematic.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9190404B2Semiconductor device and method of fabricating the same
Publication Date: 2015.11.17 SAMSUNG ELECTRONICS CO LTD
  • US9190404B2 patent drawing
  • US9190404B2 patent drawing
  • US9190404B2 patent drawing

AI summary

Provided are a semiconductor device and a method of fabricating the same. The device may include a transistor on a substrate comprising a gate insulating pattern, a gate electrode and an impurity region, a shared contact plug electrically connected to the gate electrode and the impurity region, and an etch-stop layer between side surfaces of the gate electrode and the shared contact. The shared contact plug may include a first conductive pattern electrically connected to the first impurity region and a second conductive pattern electrically connected to the gate electrode, and a top surface of the first conductive pattern may be higher than a top surface of the gate electrode.