Semiconductor Device Reducing Voltage Drop via Shared Junction
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Solution Overview
Problem
Existing semiconductor devices experience significant instantaneous voltage drops due to high resistance values in connections between power transistors and logic transistors, which are typically connected through multiple layers of metal lines, vias, and contacts, leading to abrupt voltage plummeting in logic circuits.
Innovation Solution
The semiconductor device employs power transistors connected to logic transistors using a shared semiconductor junction, such as a PN junction, instead of metal lines, vias, or contacts, to reduce resistance and voltage drops, with the power transistors being at least twice the size of the logic transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If power transistors are connected to logic transistors through multiple layers of metal lines, vias, and contacts, then the device complexity is reduced and ease of manufacture is improved, but the connection resistance increases causing significant instantaneous voltage drops
Solution Approach 1:
The patent merges the connection between power transistor and logic transistor by sharing a common semiconductor junction (substrate contact) instead of using separate metal line connections. This consolidation reduces the number of interconnection elements and their associated resistances, thereby reducing instantaneous voltage drops while maintaining manufacturing simplicity.
Solution Approach 2:
The patent introduces a shared semiconductor junction as an intermediary connection point between the power transistor and logic transistor. This mediator provides a low-resistance path that eliminates the need for high-resistance metal line connections, thus stabilizing voltage while preserving ease of manufacture through standard semiconductor fabrication processes.
2Reliability
If the size of power transistors is increased to reduce resistance, then the instantaneous voltage drop is reduced, but the device area increases
Solution Approach 1:
The patent combines the substrate connections of power transistors and logic transistors into a shared semiconductor junction. This merging allows the use of smaller power transistor dimensions while achieving low connection resistance, thus reducing instantaneous voltage drops without proportionally increasing device area.
Solution Approach 2:
The patent moves the connection interface from the metal line layer to the substrate level, utilizing the vertical dimension of the semiconductor structure. By establishing connections at the substrate contact level rather than through horizontal metal lines, the design achieves low resistance paths without occupying additional planar area.
Data Source
AI summary
A semiconductor device for reducing an instantaneous voltage drop is provided. The semiconductor device includes a first power line configured to provide a first power supply voltage and a first power transistor connected between the first power line and a first logic transistor. The first power transistor includes a first source or drain connected to the first power line, a gate receiving a power gating control signal, and a second source or drain connected to a first source or drain of the first logic transistor using a shared semiconductor junction.