Semiconductor Device With Shared Metal Oxide Channel

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Solution Overview

Problem

Current semiconductor devices face challenges in achieving miniaturization, high integration, high operating speed, favorable electrical characteristics, low power consumption, and large memory capacity while maintaining reliability.

Innovation Solution

A semiconductor device comprising a first transistor, a second transistor, and a capacitor, where the transistors share a metal oxide layer acting as a channel formation region and a capacitor with ferroelectric material is used to enhance memory capacity and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If transistors are stacked to increase memory capacity, then memory capacity is improved, but device complexity increases

Engineering Contradiction:
Improvememory capacityVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent merges the channel formation regions of multiple transistors by using a single shared metal oxide layer. This allows multiple transistors to be formed without proportionally increasing the number of separate channel layers, thereby reducing device complexity while maintaining increased memory capacity through transistor stacking.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared metal oxide layer serves as the channel formation region for multiple transistors simultaneously, making it a multi-functional component. This universal approach reduces the overall structural complexity while enabling higher integration density and memory capacity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If transistors are miniaturized to increase integration, then device complexity is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
ImproveintegrationVSAvoidmanufacturing precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

By combining multiple channel formation regions into a single shared metal oxide layer, the patent reduces the number of separate precision-critical deposition steps. This merging approach lowers manufacturing precision requirements while enabling higher integration through miniaturization.

Inventive Principle:
Principle #5Merging (Combining)

3Quantity of substance

If ferroelectric material is used in capacitor to enhance memory capacity, then memory capacity is improved, but reliability may deteriorate due to material sensitivity

Engineering Contradiction:
Improvememory capacityVSAvoidreliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent introduces an intermediary insulating layer between the ferroelectric material and surrounding structures. This intermediary layer protects the ferroelectric material from environmental factors and structural stress, thereby maintaining reliability while preserving the high memory capacity benefits of ferroelectric materials.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed semiconductor device achieves miniaturization, high integration, fast operating speed, stable electrical characteristics, low power consumption, and a large memory capacity, while ensuring high reliability.

Implementation Method 1

a material that can have ferroelectricity between the sixth conductor and the seventh conductor

Methodology Applied
Scientific EffectFerroelectricity:

Data Source

PatentUS20250159900A1Semiconductor device
Publication Date: 2025.05.15 SEMICON ENERGY LAB CO LTD
  • US20250159900A1 patent drawing
  • US20250159900A1 patent drawing
  • US20250159900A1 patent drawing

AI summary

A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first transistor that includes a first conductor, a first insulator, a first metal oxide, a second insulator, a second conductor, and a third conductor and a fourth conductor which cover parts of a top surface and parts of a side surface of the first metal oxide, which are stacked in this order from the bottom. A second transistor includes a fifth conductor, the first insulator, a second metal oxide, a third insulator, a sixth conductor, and a seventh conductor and a eighth conductor which cover parts of a top surface and parts of a side surface of the second metal oxide, which are stacked in this order from the bottom. A third transistor includes a ninth conductor, the first insulator, the second metal oxide, a fourth insulator, a tenth conductor, an eighth conductor, and an eleventh conductor covering part of the top surface and part of the side surface of the second metal oxide, which are stacked in this order from the bottom. One electrode of a capacitor including a material that can have ferroelectricity is electrically connected to the third conductor and the sixth conductor.