Semiconductor Shielding with Silicide and Multi-Layer Metal
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Solution Overview
Problem
The existing configuration of electrical energy measurement instruments faces challenges in minimizing circuit size due to the difficulty in densely laying out metal lines for shields without increasing the number of wiring layers, which affects the inductor's wiring area and overall circuit size.
Innovation Solution
A semiconductor device is designed with a shield formed by a combination of metal lines in multiple wiring layers and silicide, where the silicide is used between the substrate and the wiring layers above it to surround the inductor, reducing the need for additional wiring layers and minimizing noise interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal lines for forming the shield are wired only on a single wiring layer at high density, then noise shielding effectiveness is improved, but manufacturing difficulty increases due to dishing and etching issues
Solution Approach 1:
The shield is segmented into multiple parts distributed across different wiring layers. Instead of forming a continuous high-density shield on a single layer, the shield is divided into segments on multiple layers (e.g., first shield on wiring layer 1, second shield on wiring layer 2), which reduces manufacturing difficulty while maintaining shielding effectiveness.
Solution Approach 2:
The shield configuration transitions from a two-dimensional planar arrangement on a single wiring layer to a three-dimensional multi-layer structure. By utilizing the vertical dimension (stacking shields on multiple wiring layers), the patent achieves effective noise shielding without requiring excessive horizontal density on any single layer, thus avoiding dishing and etching problems.
2Ease of manufacture
If metal lines for forming the shield are disposed in a plurality of layers, then manufacturing difficulty is reduced, but the number of wiring layers available for the inductor is reduced, causing circuit size to increase
Solution Approach 1:
Different wiring layers are assigned different functions based on their local requirements. Lower wiring layers (e.g., wiring layer 1) are used for both inductor formation and shield formation, while upper wiring layers (e.g., wiring layer 2) are used for shield formation and signal routing. This local differentiation allows efficient use of each layer's capabilities.
Solution Approach 2:
Certain wiring layers serve multiple functions simultaneously. For example, wiring layer 1 is used both for forming the inductor and for forming the first shield, maximizing the utility of each wiring layer and reducing the total number of layers required for both inductor and shield formation.
3Ease of manufacture
If the shield is formed with larger gaps to ease manufacturing, then ease of manufacture is improved, but noise shielding effectiveness deteriorates
Solution Approach 1:
The patent compensates for larger gaps in the horizontal dimension by adding shielding capacity in the vertical dimension through multi-layer shield configuration. The stacked shields on multiple wiring layers provide continuous noise blocking paths that remain effective even when individual layer shields have larger gaps for manufacturing ease.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces circuit size by allowing more wiring layers for the inductor while maintaining effective noise shielding, preventing external noise from affecting the inductor and vice versa.
Implementation Method 1
a shield that is also formed in a wiring layer(s) of a semiconductor device so as to surround the inductor. The shield is disposed in order to prevent external noises from affecting the inductor (or prevent noises caused in the inductor from affecting external components)
Data Source
AI summary
According to one embodiment, a semiconductor device 1 includes an Si substrate 11, an inductor 12 formed in wiring layers disposed above the Si substrate 11, and a shield 13 formed so as to surround the inductor 12, in which the shield 13 includes metals 105 to 109 formed in, among the wiring layers, a layer in which the inductor 12 is formed and a layer above that layer, and a silicide 104 formed between the Si substrate 11 and the wiring layers above the Si substrate 11.