Selective Shielding Masks for Semiconductor Package Heat Dissipation
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Solution Overview
Problem
The semiconductor industry faces challenges in integrating complex electronic components that require selective electromagnetic shielding, as global shielding is neither cost-effective nor advantageous for heat dissipation, and existing methods lack the ability to selectively apply shielding layers on semiconductor packages.
Innovation Solution
An apparatus and method utilizing a tray with guide holes and deposition masks with pins to selectively apply a shielding layer on semiconductor packages, allowing for partial coverage and flexible shielding configurations to accommodate different components' needs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a metal cover or uniformly spread coating is applied as a shielding layer, then electromagnetic shielding is achieved, but cost increases and heat dissipation is compromised
Solution Approach 1:
The patent applies shielding material only to specific regions of the semiconductor package where electromagnetic interference protection is needed, rather than uniformly coating the entire package. This is achieved through a mask aligner system that selectively deposits shielding material on predetermined areas, reducing material costs and maintaining heat dissipation pathways in non-shielded regions.
2Object-affected harmful factors
If a metal cover or uniformly spread coating is applied as a shielding layer, then electromagnetic shielding is achieved, but heat dissipation is compromised
Solution Approach 1:
The patent selectively applies shielding material only to specific regions where electromagnetic interference protection is required, leaving other regions uncovered for optimal heat dissipation. The mask aligner system enables precise control over shielding material deposition, ensuring that thermal pathways remain open in non-shielded areas while providing EMI protection where needed.
3Ease of manufacture
If selective shielding is implemented, then cost-effectiveness and heat dissipation are improved, but device complexity increases
Solution Approach 1:
The patent divides the shielding application process into manageable components: a tray system for holding semiconductor packages, a mask aligner system with interchangeable masks for different shielding patterns, and a deposition system. This segmentation allows for standardized, repeatable processes that reduce operational complexity despite the selective nature of the shielding.
Solution Approach 2:
The patent introduces a mask aligner system as an intermediary tool between the shielding material source and the semiconductor package. This intermediary enables precise, selective application of shielding material through mask patterns, simplifying the control of complex selective shielding requirements while maintaining ease of manufacture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables cost-effective and flexible selective shielding of semiconductor packages, preventing interference while allowing for optimal heat dissipation and functionality, such as in MRAM devices and antennas.
Implementation Method 1
a deposition source configured to deposit a shielding material onto the tray to form a shielding layer on each of the semiconductor packages
Data Source
AI summary
An apparatus for selectively forming a shielding layer on a semiconductor package is provided. The apparatus includes: a tray including a plurality of package seats, the tray defines, for each of the plurality of package seats, one or more sets of guide holes outside the package seat; deposition masks, each of the deposition masks includes: a set of pins releasably inserted within one set of the one or more sets of guide holes to place the deposition mask on the tray; and a cover attached to the set of pins, the cover is configured to cover at least a portion of an outer surface of a semiconductor package received within a package seat when the set of pins is inserted within the set of guide holes associated with the package seat; and a deposition source configured to deposit a shielding material.