Semiconductor Shielding Structure for Noise Reduction

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Solution Overview

Problem

Existing semiconductor capacitor structures face challenges in reducing noise interference and parasitic capacitance, which affect the performance of electrical devices, especially capacitors, due to limitations in shielding effectiveness and design.

Innovation Solution

A semiconductor structure is designed with a first shielding layer of high density and a second shielding layer of lower density, electrically interconnected to effectively ground the first shielding structure and reduce noise and parasitic capacitance by increasing the distance between shielding structures and electrical devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single shielding layer is used, then the structure is simple, but the noise shielding effectiveness is insufficient

Engineering Contradiction:
Improveshielding structureVSAvoidnoise interference
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The shielding structure is divided into multiple shielding layers (first shielding layer, second shielding layer, third shielding layer) with different densities. Each layer serves as an independent shielding unit, collectively providing enhanced noise shielding effectiveness while maintaining manageable structural complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension of density variation among shielding layers. The first shielding layer has high density, the second shielding layer has medium density, and the third shielding layer has low density. This dimensional differentiation optimizes the balance between noise shielding effectiveness and parasitic capacitance reduction.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Object-affected harmful factors

If shielding structures are placed close to electrical devices, then noise shielding is effective, but parasitic capacitance increases

Engineering Contradiction:
Improvenoise interferenceVSAvoidparasitic capacitance
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

Different shielding layers are positioned at different distances from the electrical device, creating local quality variations. The first shielding layer is closest to the device with high density for immediate protection, while subsequent layers are progressively farther away with reduced density, optimizing the local shielding effectiveness at each distance zone.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the density parameter of shielding layers from uniform to non-uniform distribution. The first shielding layer has high density, the second has medium density, and the third has low density. This parameter variation allows effective noise shielding near the device while reducing parasitic capacitance at greater distances.

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If high density shielding is used throughout, then noise shielding is maximized, but parasitic capacitance with electrical devices increases

Engineering Contradiction:
Improvenoise interferenceVSAvoidparasitic capacitance
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent applies parameter changes by varying the density of shielding layers from high to low. The first shielding layer uses high density material for maximum noise shielding near the device, while the second and third layers use progressively lower density materials, reducing parasitic capacitance while maintaining shielding effectiveness.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Different density levels are assigned to different shielding layers based on their positional relationship with the electrical device. The first shielding layer closest to the device has high density for immediate noise protection, while outer layers have lower density to minimize parasitic capacitance effects.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11367774B2Semiconductor structure and formation method thereof
Publication Date: 2022.06.21 SEMICON MFG INT (SHANGHAI) CORP
  • US11367774B2 patent drawing
  • US11367774B2 patent drawing
  • US11367774B2 patent drawing

AI summary

A semiconductor structure and a fabrication method of the semiconductor structure are provided in the present disclosure. The semiconductor structure includes a substrate, where the substrate includes a shielding region having a first area; a first shielding layer on the substrate, where a first shielding structure is in the first shielding layer of the shielding region, and the first shielding structure has a first density; a second shielding layer on the first shielding layer, where a second shielding structure is in the second shielding layer of the shielding region, and the second shielding structure has a second density which is less than the first density; and an electrical interconnection structure, electrically interconnecting the first shielding structure with the second shielding structure and enabling the first shielding structure grounded.