Semiconductor Shift Control Circuit for Auto-Pre-Charge
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Solution Overview
Problem
Semiconductor devices face challenges in efficiently performing pre-charge operations following read or write operations, as existing methods lack effective control over auto-pre-charge commands and synthesis pre-charge signals, leading to inefficiencies in managing bank pre-charge signals.
Innovation Solution
The semiconductor device incorporates a shift control circuit and synthesis pre-charge signal generation circuit to generate shift signals and auto-pre-charge signals based on read commands and addresses, allowing for controlled auto-pre-charge operations by distinguishing between auto-pre-charge and pre-charge commands, thereby optimizing pre-charge operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a pre-charge operation is performed using a method generating a pre-charge command based on a command, then the pre-charge operation can be executed, but the control over auto-pre-charge commands is insufficient leading to inefficiencies in managing bank pre-charge signals
Solution Approach 1:
The pre-charge control functionality is segmented into distinct circuits: a shift control circuit that generates shift signals based on command types, and a synthesis pre-charge signal generation circuit that combines shift signals with bank addresses to generate final pre-charge signals. This segmentation allows independent optimization of each circuit's function while improving overall pre-charge operation efficiency.
Solution Approach 2:
The shift control circuit performs preliminary action by generating shift signals in advance based on the decoded command type (auto-pre-charge vs. pre-charge). This preliminary signal generation enables the synthesis circuit to efficiently combine signals with bank addresses without complex decision-making at the final execution stage, thereby improving pre-charge operation efficiency.
2Productivity
If auto-pre-charge commands are not properly distinguished from pre-charge commands, then command processing is simplified, but pre-charge operations cannot be efficiently optimized for different command types
Solution Approach 1:
The shift control circuit acts as an intermediary between the command decoding stage and the pre-charge signal generation stage. It receives the decoded command type and generates appropriate shift signals that encode the command type information, which is then used by the synthesis circuit to generate the correct pre-charge signals. This intermediary approach enables efficient optimization for different command types without requiring complex detection at each stage.
3Reliability
If shift read signals are not reset properly, then the circuit operation continues uninterrupted, but auto-pre-charge operations cannot be correctly synchronized with read operations
Solution Approach 1:
The shift control circuit implements feedback by monitoring the shift signal state and using it to control the reset timing of the shift read signal. When the shift signal indicates completion of the required operation, it triggers the reset of the shift read signal through the synthesis pre-charge signal generation circuit. This feedback mechanism ensures reliable synchronization of auto-pre-charge operations with read operations while maintaining proper timing.
Data Source
AI summary
A semiconductor device includes a shift control circuit and a synthesis pre-charge signal generation circuit. The shift control circuit generates a shift signal and a shift read signal based on a read command and controls a reset status of the shift read signal based on the shift signal and an auto-pre-charge command. The synthesis pre-charge signal generation circuit generates a synthesis pre-charge signal for an auto-pre-charge operation of a bank selected by an address based on the shift read signal and the address.