Semiconductor Structure With Side-Contact Conductive Layer

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Solution Overview

Problem

In Vertical Gate All Around (VGAA) technologies, the small top surface area of silicon pillars results in higher contact resistance between the silicon pillar and the capacitor, negatively impacting device performance.

Innovation Solution

A semiconductor structure is designed with crisscross trenches in the substrate forming silicon pillars, where a conductive layer covers both the top surface and a partial side surface of each silicon pillar, increasing the contact area with a capacitor and reducing resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a capacitive metal is contacted only on the top surface of a silicon pillar by means of exposure alignment sequence, then the manufacturing process is simple, but the contact resistance between the silicon pillar and capacitor is large

Engineering Contradiction:
Improvecontact resistanceVSAvoidconductive layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The conductive layer is extended from the top surface to the side surface of the silicon pillar, utilizing the vertical dimension to increase contact area. This dimensional extension transforms the contact interface from a single-plane (top surface only) to a multi-plane structure (top surface + side surface), thereby reducing contact resistance without complicating the manufacturing process

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The conductive layer is formed to cover both the top surface and side surface of the silicon pillar before the capacitor is formed. This preliminary action ensures that when the capacitor is subsequently formed, the conductive layer is already in place to provide low-resistance contact, eliminating the need for additional alignment steps

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the top surface area of silicon pillar is small, then the device structure is compact, but the contact resistance between silicon pillar and capacitor increases

Engineering Contradiction:
Improvecontact resistanceVSAvoidcontact area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Instead of increasing the top surface area of the silicon pillar (which would compromise device compactness), the conductive layer is extended onto the side surface of the pillar. This utilizes the vertical dimension to provide additional contact area while maintaining the compact footprint of the device structure

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The conductive layer acts as an intermediary between the silicon pillar and the capacitor. By extending this intermediary layer onto the side surface of the pillar, the contact area is increased without requiring a larger pillar top surface, thus maintaining compact device structure while reducing contact resistance

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20230089142A1Semiconductor structure and method for fabricating semiconductor structure
Publication Date: 2023.03.23 CHANGXIN MEMORY TECH INC
  • US20230089142A1 patent drawing
  • US20230089142A1 patent drawing
  • US20230089142A1 patent drawing

AI summary

Embodiments provide a semiconductor structure and a method for fabricating a semiconductor structure. The semiconductor structure includes a substrate, where a plurality of trenches are crisscross arranged in the substrate, such that a plurality of silicon pillars are formed on the substrate, and each of the plurality of trenches is filled with a spacer. A conductive layer is arranged at a top of a given one of the plurality of silicon pillars, where the conductive layer covers a top surface of the given silicon pillar and a partial side surface thereof adjacent to the top surface, and the conductive layer is configured to contact with a capacitor.