Semiconductor Sidewall Patterning for Sub-Pitch Critical Dimensions
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Solution Overview
Problem
Current photolithography techniques face challenges in forming features with critical dimensions smaller than their minimum pitch, limiting the reduction of IC sizes without requiring new or expensive lithography tools.
Innovation Solution
A semiconductor structure and manufacturing method involving a primary pattern with a first critical dimension and a secondary pattern on its sidewall, formed through ion implantation and thermal oxidation, which reduces the critical dimension without relying on new photolithographic techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography techniques are used to pattern ICs, then features can be formed with current tools, but the critical dimension cannot be reduced below the minimum pitch
Solution Approach 1:
The pattern formation process is divided into two stages: first forming a primary pattern at the minimum pitch using conventional photolithography, then forming a secondary pattern on the sidewall of the primary pattern to achieve the final reduced critical dimension. This segmentation allows each stage to operate within its capability limits while achieving an outcome beyond what either stage could accomplish alone.
Solution Approach 2:
The invention transitions from two-dimensional planar patterning to three-dimensional sidewall patterning. By forming the secondary pattern on the vertical sidewall surface of the primary pattern, the process exploits the additional vertical dimension to create features with critical dimensions smaller than the photolithography minimum pitch.
2Manufacturing precision
If new lithography tools or techniques are used to reduce critical dimension, then smaller feature sizes can be achieved, but cost and complexity increase
Solution Approach 1:
The primary pattern serves as an intermediary structure that enables the formation of the secondary pattern. Instead of directly forming the final pattern with complex lithography tools, the primary pattern acts as a template or mediator that allows conventional tools to indirectly create the desired sub-pitch features through the sidewall secondary pattern formation.
Solution Approach 2:
The invention replaces the need for complex advanced lithography mechanical/optical systems with a combination of conventional photolithography followed by chemical vapor deposition or atomic layer deposition processes. This substitution uses material deposition and etching mechanisms instead of pushing the limits of optical resolution.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the reduction of critical dimensions in ICs without the need for new tools or techniques, allowing for smaller feature sizes in ICs while maintaining cost-effectiveness.
Implementation Method 1
forming a plurality of processed areas on the pattern top surface of the primary pattern and on the top surface of the base layer exposed by the primary pattern
Implementation Method 2
A secondary pattern is formed on the sidewall of the primary pattern
Data Source
AI summary
A semiconductor structure includes a base layer with a top surface and a plurality of processed areas. A primary pattern is disposed on the top surface of the base layer, wherein the primary pattern has a pattern top surface, a processed area on the pattern top surface, and a sidewall, and the primary pattern has a first critical dimension, and the processed areas are on the part of the top surface of the base layer exposed by the primary pattern. A secondary pattern is disposed on the sidewall of the primary pattern, wherein the secondary pattern has a second critical dimension, and the second critical dimension is smaller than the first critical dimension.