Semiconductor Device With Region-Specific SiGe Epitaxial Patterns
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Solution Overview
Problem
Current semiconductor devices face challenges in scaling integrated circuit density and effectively controlling current without increasing gate length, while also managing the short channel effect, particularly in multi-gate transistors with three-dimensional channels.
Innovation Solution
The semiconductor device incorporates a substrate with distinct regions, each featuring epitaxial patterns with varying silicon germanium (SiGe) concentrations and gate structures, optimized to improve carrier mobility and control the short channel effect by adjusting Ge concentrations in the epitaxial patterns across different regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-gate transistors with three-dimensional channels are used to increase integration density, then scaling capability is improved, but short channel effect control becomes more difficult
Solution Approach 1:
The patent applies local quality by forming different epitaxial patterns with different Ge concentrations in different regions of the semiconductor device. Specifically, a first epitaxial pattern with a first Ge concentration is formed in a first region, while a second epitaxial pattern with a second Ge concentration (higher than the first) is formed in a second region. This allows optimization of carrier mobility and short channel effect control in different device regions according to their specific requirements.
Solution Approach 2:
The patent changes the Ge concentration parameter in the epitaxial patterns to resolve the technical contradiction. By adjusting the Ge concentration from a first concentration in the first region to a second concentration (higher than the first) in the second region, the patent optimizes both carrier mobility and short channel effect control, enabling improved device performance while maintaining scaling capability.
2Reliability
If gate length is increased to control current, then current control capability is improved, but device scaling is hindered
Solution Approach 1:
The patent applies local quality by implementing region-specific epitaxial patterns with different Ge concentrations. The first epitaxial pattern with lower Ge concentration is formed in the first region, while the second epitaxial pattern with higher Ge concentration is formed in the second region. This localized optimization allows current control capability to be improved through material composition rather than geometric scaling, thereby maintaining scaling capability.
Solution Approach 2:
The patent changes the Ge concentration parameter as an alternative to changing gate length for current control. By adjusting the Ge concentration in the epitaxial patterns, the patent achieves improved current control capability while maintaining the scaled-down gate dimensions necessary for high-density integration.
3Reliability
If Ge concentration is optimized in epitaxial patterns to suppress short channel effect, then device performance is improved, but manufacturing complexity increases
Solution Approach 1:
The patent implements local quality by forming epitaxial patterns with different Ge concentrations in different regions. The first epitaxial pattern with a first Ge concentration is formed in the first region, and the second epitaxial pattern with a second Ge concentration is formed in the second region. This approach allows short channel effect suppression to be achieved through targeted material composition optimization rather than complex device structure modifications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the performance of semiconductor devices by optimizing Ge concentrations in epitaxial patterns, improving current-voltage characteristics and reducing the short channel effect, thereby enabling better integration and performance in diverse regions of the device.
Implementation Method 1
Each of the first epitaxial pattern and the second epitaxial pattern includes silicon germanium (SiGe). The first epitaxial pattern may have a first Ge concentration and the second epitaxial pattern may have a second Ge concentration higher than the first Ge concentration.
Data Source
AI summary
A semiconductor device includes a substrate including a first region and a second region, a first active pattern on the first region, a first gate structure having a first width in the first direction, on the first active pattern, a first epitaxial pattern disposed in the first active pattern on a side surface of the first gate structure, a second active pattern on the second region, a second gate structure having a second width greater than the first width in the first direction, on the second active pattern and a second epitaxial pattern disposed in the second active pattern on a side surface of the second gate structure. Each of the first epitaxial pattern and the second epitaxial pattern includes silicon germanium (SiGe), and a first Ge concentration of the first epitaxial pattern is lower than a second Ge concentration of the second epitaxial pattern.


