Semiconductor Device Sigma-Shaped Recess Flat Bottom
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Solution Overview
Problem
The existing methods for forming Σ-shaped recesses in semiconductor devices often result in a cuspate bottom, which hinders the growth of high-quality SiGe and affects the performance of PMOS devices by applying stress to the channel region.
Innovation Solution
A method involving the formation of a U-shaped recess followed by epitaxial growth of a SiGe layer on the bottom and selective wet etching using an etchant with a higher etching rate for Si than SiGe, ensuring a flat bottom and preventing overetching, while also removing the thin SiGe film from the sidewalls to maintain the SiGe layer on the bottom.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If orientation selective wet etching is used to form a Σ-shaped recess, then the etching rate of certain orientations is enhanced, but the bottom of the recess becomes cuspate due to overetching
Solution Approach 1:
A thin SiGe film is deposited on the sidewalls of the U-shaped recess before performing orientation-selective wet etching. This preliminary deposition creates a protective layer that prevents the etchant from attacking the bottom corners of the recess, thereby avoiding the formation of a cuspate bottom while still allowing the etching process to proceed at high speed on the sidewalls.
Solution Approach 2:
The thin SiGe film acts as an intermediary protective layer between the etchant and the silicon substrate at the recess bottom. This intermediate layer selectively protects the bottom corners from overetching while permitting the etchant to remove material from the sidewalls, thus resolving the contradiction between high etching rate and bottom flatness.
2Shape
If a cuspate bottom is formed in the recess, then orientation selective etching is achieved, but high quality SiGe growth is hindered
Solution Approach 1:
The thin SiGe film is deposited in advance on the sidewalls before the orientation-selective etching process. This preliminary action ensures that when the etching creates the Σ-shaped recess, the bottom remains flat and protected, providing a suitable substrate for subsequent high-quality SiGe epitaxial growth.
Solution Approach 2:
The etching process uses chemical solutions (hydraulic/chemical means) to selectively remove material. By controlling the etching chemistry and using the protective SiGe film, the process achieves the desired Σ-shaped profile without creating a cuspate bottom, ensuring the recess geometry is compatible with high-quality SiGe growth.
3Productivity
If wet etching with high etching rate is performed, then productivity is improved, but overetching occurs causing sidewall intersection
Solution Approach 1:
The thin SiGe film is deposited on the sidewalls before the high-rate wet etching process. This preliminary protective coating allows the etching to proceed rapidly without causing overetching at the bottom corners, maintaining precise geometric control throughout the high-productivity etching process.
Solution Approach 2:
The SiGe film serves as an intermediary protective barrier during the high-rate wet etching process. It mediates between the aggressive etchant and the silicon substrate, preventing unwanted material removal at the bottom while allowing efficient etching of the sidewalls, thus maintaining geometric precision during high-productivity processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents the formation of a cuspate bottom, allowing for high-quality SiGe growth and enhancing the stress application in the channel region, thereby improving carrier mobility in PMOS devices.
Implementation Method 1
performing wet etching having orientation selectivity on the Si substrate of the sidewall of the U-shaped recess by using an etchant having a higher etching rate with respect to Si as compared to SiGe
Implementation Method 2
forming a SiGe layer on the bottom of the U-shaped recess through epitaxial growth
Data Source
AI summary
A semiconductor device and manufacturing method therefor includes a Σ-shaped embedded source or drain regions. A U-shaped recess is formed in a Si substrate using dry etching and a SiGe layer is grown epitaxially on the bottom of the U-shaped recess. Using an orientation selective etchant having a higher etching rate with respect to Si than SiGe, wet etching is performed on the Si substrate sidewalls of the U-shaped recess, to form a Σ-shaped recess.


