Semiconductor Device Silicide Protection via Spacer Etching
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Solution Overview
Problem
The stress proximity technique (SPT) for semiconductor devices results in silicide loss during the removal of sidewall spacers, which affects device performance and requires a method to avoid this loss while maintaining stress transfer effectiveness.
Innovation Solution
A protecting layer, comprising conductive materials like Cobalt Tungsten Phosphide (CoWP) or Cobalt Molybdenum Phosphide (CoMoP), is deposited on the silicide material to prevent etching during the removal of sidewall spacers, allowing for effective stress film deposition without silicide loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the stress proximity technique is implemented by removing sidewall spacers to shorten the distance between stress film and channel region, then stress transfer effectiveness is improved, but silicide loss occurs during the etching process
Solution Approach 1:
A protecting layer is deposited on the silicide material before removing the sidewall spacers. This preliminary protective action prevents silicide loss during the subsequent etching process while still allowing the stress proximity technique to be implemented by removing the spacers to shorten the distance between stress film and channel region.
Solution Approach 2:
The protecting layer acts as an intermediary substance between the etching process and the silicide material. It mediates the interaction by being resistant to the etching chemistry, thereby protecting the silicide from being removed while allowing the etching of sidewall spacers to proceed.
2Loss of substance
If a protecting layer is deposited on silicide material to prevent silicide loss, then silicide preservation is improved, but process complexity increases
Solution Approach 1:
The protecting layer serves multiple functions: it protects silicide from etching damage, provides a stable surface for subsequent stress film deposition, and can be integrated with existing process flows. This multi-functionality justifies the additional process step by delivering multiple benefits from a single layer.
Solution Approach 2:
The protecting layer changes the surface properties and chemical resistance parameters of the silicide material, making it resistant to the etching process. This parameter change allows the silicide to withstand conditions it would normally be vulnerable to, enabling process optimization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method prevents silicide loss and enhances device performance by ensuring stress is effectively transferred to the channel region, improving carrier mobility and current driving capabilities of NMOS and PMOS devices.
Implementation Method 1
A protecting layer, comprising conductive materials like Cobalt Tungsten Phosphide (CoWP) or Cobalt Molybdenum Phosphide (CoMoP), is deposited on the silicide material
Implementation Method 2
a stress can be transferred to the channel region, so that the device performance can be significantly affected
Data Source
AI summary
A semiconductor device and manufacture method thereof include a silicide material formed on a source region and a drain region on opposite sides of a gate, wherein the gate having sidewalls on both side surfaces is formed on a substrate. The gate has a first sidewall spacer and a second sidewall spacer on each sidewall, the first spacer has a horizontal portion and a vertical portion, the horizontal portion is located between the second sidewall spacer and the substrate, the vertical portion is located between the second sidewall spacer and the sidewalls. A protecting layer is selectively deposited on the silicide material.