Semiconductor Gate Stack Silicon Diffusion Barrier

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Solution Overview

Problem

As semiconductor devices approach technology nodes below 10 nm, such as 5 nm or 3 nm, challenges arise in maintaining device performance and integration density due to increased difficulties in feature size reduction, including elemental diffusion affecting threshold voltage and integration density.

Innovation Solution

The process involves forming semiconductor fins, recessing dielectric material, and depositing gate stacks with specific materials and treatments to prevent elemental diffusion, including using a silicon-containing gas to treat the p-metal work function layer, thereby blocking harmful elements like aluminum and maintaining the gate stack thickness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If feature size is reduced to improve integration density, then more components can be integrated into a given area, but elemental diffusion affects threshold voltage and device performance

Engineering Contradiction:
Improveintegration densityVSAvoidthreshold voltage stability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

A silicon-containing layer is introduced as an intermediary between the p-metal work function layer and the n-metal work function layer. This intermediate layer acts as a diffusion barrier that prevents aluminum and other elements from the n-metal layer from diffusing into the p-metal layer, thereby maintaining threshold voltage stability while allowing continued miniaturization for high integration density

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The gate stack employs a composite structure with multiple functional layers: p-metal work function layer, silicon-containing layer, and n-metal work function layer. Each layer serves a specific function - the p-metal layer provides hole injection, the silicon layer provides diffusion barrier, and the n-metal layer provides electron injection. This composite structure resolves the contradiction by combining materials with complementary properties

Inventive Principle:
Principle #40Composite materials

2Reliability

If p-work function metal thickness is increased to maintain device performance, then threshold voltage control improves, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvethreshold voltage controlVSAvoidgate stack structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The silicon-containing layer serves as a mediator that enables effective threshold voltage control without requiring increased p-metal thickness. By blocking element diffusion, this intermediate layer preserves the functionality of thinner p-metal layers, simplifying the overall gate stack structure while maintaining performance

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the chemical composition parameter by introducing silicon into the gate stack structure. This compositional change creates a diffusion barrier that alters the transport properties of elements within the gate stack, enabling effective threshold voltage control through composition modification rather than thickness increase

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the semiconductor device's performance by reducing elemental diffusion, modifying the threshold voltage without increasing the p-work function metal thickness, and maintaining process windows, thus improving integration density and device reliability.

Implementation Method 1

treating the first p-metal work function layer with a silicon containing gas... blocking harmful elements like aluminum

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

depositing gate stacks with specific materials... depositing a gate dielectric over a semiconductor fin; depositing a first p-metal work function layer over the gate dielectric

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Data Source

PatentUS11127857B2Semiconductor device and method of manufacture
Publication Date: 2021.09.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11127857B2 patent drawing
  • US11127857B2 patent drawing
  • US11127857B2 patent drawing

AI summary

Semiconductor devices and methods of manufacturing semiconductor devices are provided. In embodiments a treatment process is utilized in order to introduce silicon into a p-metal work function layer. By introducing silicon into the p-metal work function layer, subsequently deposited layers which may comprise diffusable materials such as aluminum can be prevented from diffusing through the p-metal work function layer and affect the operation of the device.