Semiconductor Simulation Platform Hardware Acceleration
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Solution Overview
Problem
Conventional electronic design automation (EDA) platforms for semiconductor device simulations are computationally inefficient due to reliance on CPU-only computing systems and require high-resolution mesh grids, leading to time-consuming and memory-intensive processes for large-scale simulations.
Innovation Solution
A semiconductor device simulation system that utilizes a hardware-based platform with a CPU cluster and hardware accelerator cluster, implementing multi-level restriction-prolongation (MLRP) algorithms for adaptive meshing and parallel processing to speed up continuum-scale, physics-based simulations without sacrificing accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If CPU-only computing systems are used for semiconductor device simulations, then device complexity and manufacturing precision can be maintained, but computational efficiency deteriorates and simulation time increases significantly
Solution Approach 1:
The simulation system is segmented into multiple independent processing units (GPUs, FPGAs, or other hardware accelerators) that can simultaneously perform different computational tasks. Each processing unit handles a portion of the simulation workload, allowing parallel computation that dramatically reduces total simulation time compared to sequential CPU processing.
Solution Approach 2:
The system transitions from single-threaded CPU processing to multi-dimensional parallel processing by deploying computations across multiple hardware accelerators with different architectures. This dimensional expansion in computing architecture enables simultaneous execution of multiple simulation operations, resolving the time efficiency contradiction.
2Measurement precision
If high resolution mesh grids are used for accurate simulations, then measurement precision and manufacturing precision are improved, but computational resources required increase significantly
Solution Approach 1:
The high-resolution mesh grid is divided into multiple coarser mesh grids, each handled by a separate processing unit. This segmentation allows the system to maintain high overall accuracy through multiple parallel computations while reducing the computational burden on each individual unit, thereby resolving the contradiction between accuracy and resource consumption.
Solution Approach 2:
The system dynamically adjusts mesh resolution parameters based on the specific simulation requirements and hardware capabilities. By changing the mesh grid parameters (resolution, density, distribution) adaptively, the system achieves accurate results with reduced computational resources compared to using uniformly high-resolution meshes throughout the entire domain.
3Productivity
If conventional EDA platforms are used, then ease of operation is maintained, but productivity and computational efficiency deteriorate
Solution Approach 1:
A software intermediary layer is introduced between the user and the complex hardware accelerator architecture. This intermediary provides a user-friendly interface that abstracts the underlying hardware complexity, allowing users to perform simulations without directly managing the complex parallel processing infrastructure while still benefiting from the enhanced productivity.
Data Source
AI summary
An exemplary method for semiconductor device simulation includes receiving a device structure, generating a mesh for the device structure, simulating electrical behavior of the device structure using the mesh, and adaptively adjusting the mesh during the simulating. The adaptively adjusting the mesh includes performing a multi-level restriction-prolongation (MLRP) process that decreases and increases a resolution of the mesh. The semiconductor device simulation can be performed by a semiconductor simulation system that includes a central processing unit, a memory, and a hardware accelerator. The MLRP process is at least partially parallelized on the hardware accelerator, such as a GPU.