Semiconductor Design Simulation Using Level Set Transformation
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Solution Overview
Problem
The increasing complexity of semiconductor devices leads to a significant increase in the number of polygon meshes and the amount of computation required for constructive solid geometry (CSG) operations, making existing simulation methods inefficient.
Innovation Solution
A method for semiconductor design simulation that involves generating first polygon meshes, transforming them into first level sets, performing logical operations on these level sets to generate second level sets, and finally transforming the second level sets back into second polygon meshes, thereby reducing the computational burden of CSG operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional CSG operations are performed on polygon meshes to simulate semiconductor device fabrication processes, then the simulation accuracy and model transformation capability are improved, but the computational complexity and operation time increase significantly
Solution Approach 1:
The patent introduces level sets as an intermediary representation between polygon meshes. Instead of performing CSG operations directly on complex polygon meshes, the method transforms meshes to level sets, performs simplified logical operations on level sets, and transforms back to meshes. This intermediary approach maintains simulation accuracy while dramatically reducing computational complexity and operation time.
Solution Approach 2:
The patent replaces the traditional geometric CSG operation mechanism with a level set-based mathematical transformation mechanism. By substituting the complex geometric intersection and union operations with level set arithmetic operations (addition, subtraction, multiplication), the system achieves the same model transformation capability with significantly reduced computational burden.
2Device complexity
If the number of polygon meshes increases to represent more complex semiconductor devices, then the model detail and simulation fidelity are improved, but the computational burden for CSG operations increases
Solution Approach 1:
Level sets serve as an efficient intermediary that can represent complex geometric shapes with fewer computational resources. The level set transformation compresses the information from detailed polygon meshes into a compact mathematical representation, allowing complex semiconductor device models to be manipulated with reduced computational burden while preserving model detail.
Solution Approach 2:
The patent changes the parameter representation from explicit polygon mesh coordinates to implicit level set functions. This parameter transformation allows complex geometries to be described by simpler mathematical functions, reducing the computational resources required for CSG operations while maintaining the ability to represent high device complexity.
Data Source
AI summary
A non-transitory computer-readable storage medium stores instructions. When executed by a computer, the instructions cause the computer to perform a method for a semiconductor design simulation. The method may include generating first polygon meshes, transforming the first polygon meshes to first level sets, performing logical operations on the first level sets to generate second level sets, and transforming the second level sets to second polygon meshes.