Semiconductor Encapsulation Using Low-Temperature Sintering
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor encapsulation methods, such as soldering and parallel welding, result in high material and production equipment costs while posing a risk of damaging chips and electronic components due to high connection temperatures.
Innovation Solution
A semiconductor encapsulation structure is created using an interface connection method with sintering materials, where a device base with a metallized cover-plate sintered layer and a cover plate with a metallized base sintered layer are connected using a sintering paste containing metal particles and a solvent, applied and baked at low temperatures between 100° C. and 500° C., allowing for a secure and cost-effective connection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional soldering or parallel welding is used for encapsulation, then airtight encapsulation is achieved, but material costs and production equipment costs are high
Solution Approach 1:
The patent changes the temperature parameter from conventional high-temperature soldering/welding to low-temperature sintering (below the melting point of the sintering material). This parameter change enables the use of cost-effective sintering materials instead of expensive solder or welding equipment, reducing manufacturing costs while maintaining encapsulation reliability through the metallized layers that ensure secure bonding at lower temperatures
Solution Approach 2:
The patent employs sintering materials that are generally cheaper than traditional solder or welding consumables. The sintering process uses materials like metal powders or ceramic powders bound in a vehicle, which can be applied as pastes and sintered to create durable bonds without requiring expensive welding equipment or high-cost solder materials
2Reliability
If conventional soldering or parallel welding is used for encapsulation, then airtight encapsulation is achieved, but chip and electronic components may be damaged due to high connection temperature
Solution Approach 1:
The patent fundamentally changes the temperature parameter from high-temperature processes (soldering at melting points of solder materials, welding at even higher temperatures) to low-temperature sintering. The sintering temperature is controlled to be below the melting point of the sintering material, typically in the range of 800-1200°C for ceramic-based sintering materials, which is lower than conventional soldering temperatures and certainly lower than welding temperatures, thereby preventing thermal damage to sensitive chip and electronic components while achieving secure encapsulation
Solution Approach 2:
The patent introduces metallized layers on both the base plate and cover plate as intermediary bonding surfaces. These metallized layers (which may be metal, ceramic, or glass materials with appropriate surface treatments) serve as intermediaries that enable strong bonding through sintering at lower temperatures, replacing the need for direct high-temperature soldering or welding that would expose the chip to harmful thermal conditions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method achieves a reliable and low-temperature connection, reducing encapsulating costs and ensuring the safety of electronic components, while maintaining high connection reliability.
Implementation Method 1
the sintering paste is baked and sintered by a heating device. the temperature of baking and sintering is between 100° C. and 500° C.
Data Source
AI summary
Provided is a semiconductor encapsulation structure, including: a device base (1) and a cover plate (2). The device base is provided with a cavity (11) for accommodating a chip (3). The device base is further provided with a cover-plate sintered layer (12). The cover-plate sintered layer is metallized. The cover plate matches the device base. The cover plate is provided with a base sintered layer (22). The base sintered layer is also metallized. The cover plate is connected to the base by sintering. The cover plate is connected to the base by sintering, so that low-temperature connection is achieved, thereby avoiding damage to the chip and electronic components in the base caused by high connection temperature. Furthermore, encapsulating costs are greatly reduced while ensuring connection reliability.