Semiconductor Module Sintering With Protrusion Die Pressure Equalization
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Solution Overview
Problem
Existing methods face challenges in applying uniform pressure and heat to sintered materials for bonding semiconductor chips to an insulating wiring board due to variations in chip and board thicknesses, affecting the bonding quality.
Innovation Solution
A method involving an insulating wiring board on a lower die, sintered materials at multiple points, individual buffer materials on each chip, and an upper die with protrusions corresponding to chip positions for uniform pressurization and heating of sintered materials through the buffer and chip structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional sintering methods are used with a single pressurizing surface, then the manufacturing process is simple, but uniform pressure cannot be applied to multiple sintered materials due to thickness variations in chips and wiring boards
Solution Approach 1:
The upper die is segmented into multiple protrusions, with each protrusion corresponding to a specific semiconductor chip position. Each protrusion independently pressurizes the sintered material beneath its corresponding chip, ensuring uniform pressure distribution across multiple bonding locations despite variations in chip and wiring board thicknesses.
Solution Approach 2:
The pressurizing surface of the upper die is designed with localized protrusions rather than a flat surface. Each protrusion provides concentrated local pressure exactly where needed (at the sintered material beneath each chip), while the spaces between protrusions accommodate thickness variations without compromising pressure uniformity at bonding locations.
2Length of stationary object
If buffer layers are made thinner to reduce overall structure height, then space is saved, but the ability to compensate for thickness variations is reduced
Solution Approach 1:
Instead of relying solely on vertical buffer layer thickness to compensate for variations, the solution transitions to a dimensional approach using protrusions of varying heights. Each protrusion's height is specifically designed to match the total thickness (chip + wiring board) at its location, providing precise compensation without requiring excessive buffer layer material or increasing overall structure height.
3Manufacturing precision
If multiple separate pressurizing devices are used for each chip location, then uniform pressure is achieved, but device complexity and manufacturing cost increase
Solution Approach 1:
Multiple pressurizing functions are merged into a single upper die component. The upper die integrates multiple protrusions that collectively perform the pressurizing function for all semiconductor chips simultaneously, eliminating the need for multiple separate pressurizing devices while maintaining uniform pressure distribution across all bonding locations.
Solution Approach 2:
The upper die is designed as a universal tool that can pressurize multiple different chip locations in a single operation. The protrusions are arranged to correspond to various chip positions, allowing the same upper die to universally handle different wiring board layouts and chip arrangements without requiring device changes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures uniform pressurization and heating, enhancing bonding quality and reliability of semiconductor modules while reducing manufacturing costs and complexity.
Implementation Method 1
sintering by pressurizing and heating the plurality of sintered materials by means of the protrusions through the plurality of buffer materials and the plurality of semiconductor chips
Data Source
AI summary
A method for manufacturing a semiconductor module includes arranging an insulating wiring board on a lower die, arranging sintered materials at a plurality of points on the insulating wiring board, arranging each semiconductor chip on the sintered materials, arranging each buffer material individually on the semiconductor chips, arranging, above the lower die, an upper die including protrusions at points corresponding to arrangement positions of the semiconductor chips so that the protrusions correspond to the semiconductor chips, and sintering by pressurizing and heating the sintered materials by the protrusions through the buffer materials and the semiconductor chips.