Semiconductor Device with Slit Insulating Layers for Structural Stability
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Solution Overview
Problem
The miniaturization of semiconductor devices faces challenges in maintaining the stability of interlayer insulating layers during the manufacturing process of three-dimensional semiconductor memory devices, as these layers can collapse or warp when sacrificial insulating layers are removed, leading to instability in the stacked structure.
Innovation Solution
A semiconductor device and manufacturing method that include conductive patterns forming a step structure, with first and second slit insulating layers disposed opposite to each other, penetrating the conductive patterns and contact plugs, to reinforce the structural stability of the stacked structure by providing support and maintaining the intervals between interlayer insulating layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If sacrificial insulating layers are removed to form conductive patterns, then the conductive patterns can be formed in the stacked structure, but the interlayer insulating layers collapse or warp causing structural instability
Solution Approach 1:
The patent divides the insulating layer system into multiple functional segments: sacrificial insulating layers (for pattern formation), interlayer insulating layers (for electrical isolation), and support insulating layers (for structural stability). This segmentation allows each layer type to perform its specific function without interfering with others, solving the contradiction between pattern formation and structural stability.
Solution Approach 2:
The support insulating layers act as intermediary elements between the sacrificial insulating layers and the interlayer insulating layers. During the removal of sacrificial layers, the support insulating layers remain in place to maintain the structural integrity and spacing of the stacked structure, preventing collapse or warping of the interlayer insulating layers.
2Length of moving object
If the stacked structure is miniaturized to reduce feature size, then further miniaturization is achieved, but the interlayer insulating layers become more prone to collapse and warping
Solution Approach 1:
By segmenting the insulating layer system into sacrificial, interlayer, and support functions, the patent enables miniaturization while maintaining stability. The support insulating layers provide localized structural reinforcement at each stack level, allowing the overall feature size to be reduced without compromising the stability of the interlayer insulating layers.
Solution Approach 2:
The patent changes the structural parameters of the stacked system by introducing support insulating layers with specific physical and chemical properties that differ from the sacrificial and interlayer layers. This parameter differentiation allows the structure to maintain stability at reduced dimensions, as the support layers provide mechanical reinforcement even when the overall feature size is minimized.
Data Source
AI summary
A semiconductor device may include a substrate, conductive patterns stacked to be spaced apart from each other on the substrate, contact plugs coming in contact with the respective conductive patterns, and first and second slit insulating layers of a first group penetrating the conductive patterns. The substrate may include a cell area and a contact area extending along a first direction from the cell area. The conductive patterns may be form a step structure. The first slit insulating layers of the first group may be opposite to each other in a second direction with any one of the contact plugs, interposed therebetween. The second slit insulating layers of the first group, which extend along the first direction in the contact area, may be opposite to each other in the second direction with the first slit insulating layers of the first group and the contact plugs, interposed therebetween.