Semiconductor Device With Sloped Deep Well Doping Profile
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Solution Overview
Problem
High-voltage MOS transistors face a trade-off between breakdown voltage and operational current characteristics due to impurity doping concentration in the N-type deep well or drift region, where reducing doping concentration improves breakdown voltage but increases specific on resistance, and increasing it enhances operational current but compromises breakdown voltage.
Innovation Solution
A semiconductor device design featuring a deep well and buried impurity layer with sloped impurity doping concentration profiles, where the impurity doping concentration is highest at the interface and decreases further away, and a buried impurity layer with a uniform higher concentration than the deep well, to optimize both breakdown voltage and operational current characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If impurity doping concentration is reduced in the N-type deep well or drift region, then breakdown voltage is improved, but specific on resistance increases
Solution Approach 1:
The patent applies local quality by creating distinct impurity concentration zones within the deep well structure. The first impurity concentration region has a different concentration than the second impurity concentration region, allowing each zone to serve different functions: one region optimized for breakdown voltage while another maintains low on-resistance. This spatial variation in impurity concentration resolves the contradiction by having different local properties in different regions of the same structure.
Solution Approach 2:
The deep well is segmented into multiple impurity concentration regions rather than being uniformly doped. By dividing the deep well into a first impurity concentration region and a second impurity concentration region, the patent enables independent optimization of breakdown voltage and on-resistance characteristics in different segments, thereby resolving the trade-off between these two parameters.
2Productivity
If impurity doping concentration is increased in the N-type deep well or drift region, then operational current characteristic is improved, but breakdown voltage decreases
Solution Approach 1:
The patent implements local quality by assigning different impurity concentrations to different regions of the deep well. The first impurity concentration region can be optimized for high operational current while the second impurity concentration region maintains adequate breakdown voltage. This localized differentiation allows simultaneous achievement of high productivity and reliability without compromising either parameter.
Solution Approach 2:
By segmenting the deep well into multiple impurity concentration regions, the patent enables the first region to support high operational current flow while the second region preserves breakdown voltage characteristics. This segmentation strategy resolves the contradiction between operational current performance and breakdown voltage by distributing different functional requirements to different spatial segments.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively improves breakdown voltage while maintaining suitable operational current characteristics by suppressing the increase in specific on resistance and enhancing the field across the PN junction, thus achieving balanced performance for high-voltage MOS transistors.
Implementation Method 1
a second conductive-type deep well formed above a first conductive-type substrate to include a first ion implantation region and a first diffusion region
Implementation Method 2
a first diffusion region. The first diffusion region may have impurity doping concentration that is the highest at the interface between the first ion implantation region and the first diffusion region, and that decreases as moving farther away from the interface
Data Source
AI summary
A semiconductor device includes a second conductive-type deep well configured above a substrate. The deep well includes an ion implantation region and a diffusion region. A first conductive-type first well is formed in the diffusion region. A gate electrode extends over portions of the ion implantation region and of the diffusion region, and partially overlaps the first well. The ion implantation region has a uniform impurity concentration whereas the impurity concentration of the diffusion region varies from being the highest concentration at the boundary interface between the ion implantation region and the diffusion region to being the lowest at the portion of the diffusion region that is the farthest away from the boundary interface.